JVC RX-DP10VBK - Page 23

RX-DP10VBK/RX-DP10VSL
RX-DP10RSL
1-23
PORT A ADDRESS BUS
A0-A17
VCCA(3)
GNDA(4)
PORT A DATA BUS
D0-D23
VCCS(4)
GNDD(4)
PORT A BUS CONTROL
AA0-AA2/RAS0-RAS2
CAS
RD
WR
TA
BR
BG
BB
VCCC(2)
GNDC(2)
INTERRUPT AND
MODEL CONTROL
MODA/IRQA
MODB/IRQB
MODC/IRQC
MODD/IRQD
RESET
PLL AND CLOCK
EXTAL
PINIT/NMI
PCAP
VCCP
GNDP
QUIET POWER
VCCQH(3)
VCCQL(4)
GNDQ(4)
SPDIF TRANSMITTER(DAX)
ADO[PD1]
ACI[PD0]
TIMER 0
RIO0[TIO0]
OnCE ON-CHIP EMULATION/JTAG PORT
TDI
TCK
TDO
TMS
PARALLEL HOST PORT(HD108)
HAD(7:0)[PB0-PB7]
HAS/HA0[PB8]
HA8/HA1[PB9]
HA9/HA2[PB10]
HRW/HRD[PB11]
HCS/HA10[PB13]
HOREQ/HTRQ[PB14]
HACK/HRRQ[PB15]
VCGH
GNDH
SERIAL AUDIO INTERFACE (ESAI)
SCKT[PC3]
FST[PC4]
HCKT[PC5]
SCKR[PC0]
FSR[PC1]
HCKR[PC2]
SDO0[PC11]/SDO0_1[PE11]
SDO1[PC10]/SDO1_1[PE10]
SDO2/SDI3]PC9]/SDO2_1/DSI3_1[PE9]
SDO3/SDI2[PC8]/SDO3_1/DSI2_1[PE8]
SDO4/SDI1[PC7]
SDO5/SDI0[PC6]
SERIAL AUDIO INTERFACE (ESAI_1)
SCKT_1[PE3]
FST_1[PE4]
SCKR_1[PE0]
FSR_1[PE7]
SDO4_1/SDI1_1[PE7]
SDO5_1/SDI0_1[PE6]
VCCS(2)
GNDS(2)
SERIAL HOST INTERFACE (SHI)
MOSI/HA0
SS/HA2
MISO/SDA
SCK/SCL
HREQ
Port B
Port C
Port E
Port D
3. Signal groupings