JVC RX-DP10VBK - Page 35

RX-DP10VBK/RX-DP10VSL
RX-DP10RSL
1-35
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
AVss
YOUT
VOUT
COUT
CS
SIN
SCLK
TEST
BOUT
ROUT
GOUT
VOB
XD
EXD
YIN
VIN
CIN
AVcc
IOUT
VOC
Vcc
EXS
XS
HSYNC
VSYNC
EXHSYN
EXVSYN
Vss
Dot CLK
OSC
CGROM
Output
Control
Video Signal
OSC
Analog SW
4FSC CLK
OSC
VRAM
Display Memory
Control
NTSC/PAL
Signal OSC
H/V Separate
Serial Input
Control
SCLK
SIN
COUT
YOUT
VOUT
VOB
VOC
IOUT
GOUT
ROUT
BOUT
EXD
XD
EXS
XS
CIN
YIN
VIN
CS
VSYNC
HSYNC
EXVSYN
EXHSYN
Each Block
Each Control, Data
Each Block
1. Pin layout
3.Block diagram
MB90088 (IC403) : Screen display controller
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Function
Lux signal Input terminal for Superinpause indication
Composite video signal input terminal for Superinpause indication
Contrast signal input terminal for Superinpause indication
Analog power supply terminal
Color (Lux) signal output terminal
Character output terminal
Power supply terminal
Clock generater outside circuit terminal for color burst
Horizontal signal output terminal
Vertical signal output terminal
EXT horizontal signal input terminal
EXT vertical signal input terminal
GND
Dot clock generater outside circuit signal terminal for indication
Character & background signal output terminal
Color signal (Green, Red, Blue)
Test signal input terminal
Shift clock input terminal for serial transmission
Serial data input terminal
Chip select terminal
Contrast signal output terminal
Composite video signal output terminal
Lux signal output terminal
Analog GND terminal
Symbol
YIN
VIN
CIN
AVcc
IOUT
VOC
Vcc
EXS
XS
HSYNC
VSYNC
EXHSYN
EXVSYN
Vss
EXD
XD
VOB
GOUT
ROUT
BOUT
TEST
SCLK
SIN
CS
COUT
VOUT
YOUT
AVss
I/O
I
I
I
-
O
O
-
I
O
O
O
I
I
-
I
O
O
O
I
I
I
I
O
O
O
-
2.Pin functions