JVC RX-DP10VBK - Page 37

RX-DP10VBK/RX-DP10VSL
RX-DP10RSL
1-37
2
23
22
7
19
16
3
4
9
20
25
5
26
1
27
10
13
IF
BLOCK
DE-EMPHASIS
IIR FILTER BLOCK
MODE
CONTROL
BLOCK
8fs OVER SAMPLING
DIGITAL FILTER
1ST ORDER NOISE
SHAPER BLOCK
VANS NOISE
SHAPER BLOCK
PEM
BLOCK
PEM
BLOCK
D/A BLOCK
DF BLOCK
DIN
LRCK
BCK
XIN
XOUT
CKO
OUT2C
OUT2D
Connected to VDD
Data input
L/R clock input
Bit clock input
Connected to ground
Digital power supply2
NC
Digital ground 2
Connected to ground
Connected to ground
1C PEM output
Analog power supply 1
1d PEM output
Analog ground 1
I
I
I
I
I
-
I
-
I
I
O
-
O
-
M5
DIN
LRCK
BCK
M3
DVDD2
CKO
DVSS2
M2
M1
OUT1C
AVDD1
OUT1D
AVSS1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
AVSS2
OUT2D
AVDD2
OUT2C
M9
DVSS1
XOUT
XIN
VCOF
DVDD1
M7
M8
M4
M6
-
O
-
O
I
-
O
I
I
-
I
I
I
I
Analog ground 2
2D PEM output
Analog power supply 2
2C PEM output
NC
Digital ground pin 1
Crystal oscillator output
Crystal oscillator input
VCO Filter
Digital power supply 1
System clock rate selection
System clock rate selection
Reset signal
Connected to VDD
Pin
No.
Symbol
I/O
Function
Pin
No.
Symbol
I/O
Function
M5
DIN
LRCK
BCK
M3
DVDD2
CKO
DVSS2
M2
M1
OUT1 C
AVDD1
OUT1D
AVSS1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
M6
M4
M8
M7
DVDD1
VCOF
XIN
XOUT
DVSS1
M9
OUT2C
AVDD2
OUT2D
AVSS2
MN35505 (IC634, IC639, IC644, IC649) : D/A converter
1.Pin layout
2.Block diagram
3.Pin function
OSC
BLOCK
MD
OUT1C
OUT1D
M1
M2
M3
MA
MB
MC
28
PDO