2600S-901-01 Rev. C / January 2008 Return to Section Topics 12-97
Series 2600 System SourceMeter® Instruments Reference Manual Section 12: Instrument Control Library
status.questionable.instrument.smuX.*
status.questionable.instrument.smuX.condition
status.questionable.instrument.smuX.enable
status.questionable.instrument.smuX.event
status.questionable.instrument.smuX.ntr
status.questionable.instrument.smuX.ptr
* = condition, enable, event, ntr or ptr
smuX = smua or smub
Attribute Questionable SMU event register sets.
Usage Reads condition, enable, event, NTR and PTR registers:
quesreg = status.questionable.instrument.smuX.condition
quesreg = status.questionable.instrument.smuX.enable
quesreg = status.questionable.instrument.smuX.event
quesreg = status.questionable.instrument.smuX.ntr
quesreg = status.questionable.instrument.smuX.ptr
Writes to enable, NTR and PTR registers:
status.questionable.instrument.smuX.enable = quesreg
status.questionable.instrument.smuX.ntr = quesreg
status.questionable.instrument.smuX.ptr = quesreg
Set quesreg to one of the following values:
0 Clears all bits.
status.questionable.CALIBRATING Sets CAL bit (B8).
status.questionable.CAL Sets CAL bit (B8).
status.questionable.OVER_TEMPERATURE Sets OTEMP bit (B12).
status.questionable.OTEMP Sets OTEMP bit (B12).
status.questionable.UNSTABLE_OUTPUT Sets UO bit (B9)
status.questionable.UO Sets UO bits (B9)
quesreg can also be set to the decimal weight of the bit to be set. Examples:
To set bit B8 (CAL), set quesreg to 256 (2
8
).
To set bit B9 (UO), set quesreg to 512 (2
9
).
To set bit B12 (OTEMP), set quesreg to 4096 (2
12
).
To set both bits of the register, set quesreg to the sum of the decimal weights.
To set bits B8 and B12, set quesreg to 4362 (256 + 4096).
Remarks • This attribute is used to read or write to the questionable SMU event registers.
• Reading a status register returns a value. The binary equivalent of the returned value
indicates which register bits are set. The least significant bit of the binary number is bit 0,
and the most significant bit is bit 15.
• For example, assume value 4362 is returned for the enable register. The binary equivalent
is 0001000100000000. This value indicates that bit B8 (Cal bit) and bit B4 (Meas bit) are
set.
• The used bits of the questionable SMU event registers are described as follows:
• Bit B8, CAL – Set bit indicates that calibration is questionable. Bit B9, UO - Set bit
indicates that an unstable output condition was detected.
• Bit B12, OTEMP – Set bit indicates that an over temperature condition was detected.
Details See “status.operation.user.condition = 2” in Appendix D.
Example Sets the OTEMP bit of the questionable SMU A enable register:
status.questionable.instrument.smua.enable =
status.questionable.OTEMP