3 Remote Interface Reference
138 E364xA User’s and Service Guide
The status byte summary register is cleared when:
– you execute the *CLS (clear status) command.
– Querying the Standard Event register (*ESR? command) will clear only bit
5 in the Status Byte summary register.
For example, 24 (8 + 16) is returned when you have queried the status of the
Status Byte register, QUES and MAV conditions have occurred.
The Status Byte Enable register (Request Service) is cleared when:
– You execute the *SRE 0 command.
– You turn on the power and have previously configured the power supply
using the *PSC 1 command.
The enable register will not be cleared at power-on if you have previously
configured the power supply using *PSC 0.
Using Service Request (SRQ) and serial POLL
You must configure your bus controller to respond to the IEEE-488 service request
(SRQ) interrupt to use this capability. Use the Status Byte enable register (*SRE
command) to select which summary bits will set the low-level IEEE-488 service
request signal. When bit 6 (request service) is set in the Status Byte, an IEEE-488
service request interrupt message is automatically sent to the bus controller. The
bus controller may then poll the instruments on the bus to identify which one
requested service (the instrument with bit 6 set in its Status Byte).
6 RQS 64 The power supply is requesting service (serial poll).
7 Not Used 0 Always set to 0.
Table 3-5 Bit-Definitions - Status Byte Summary Register
The request service bit is cleared only by reading the Status Byte using an
IEEE-488 serial poll or by reading the event register whose summary bit is
causing the service request.
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