Lattice Semiconductor ECP5 Versa - ECP5 Device; Applying Power to the Board

3
ECP5 Versa Development Board
®
The contents of this user guide include top-level functional descriptions of the various portions of the evaluation
board, descriptions of the on-board connectors, diodes and switches and a complete set of schematics.
*Note: The ECP5 FPGA supports DDR3 memory at data rates up to 800 Mbps.
Caution: The ECP5 Versa Development Board contains ESD-sensit
ive components. ESD safe practices should be
followed while handling and using the evaluation board.
ECP5 Device
This board features an ECP5 FPGA with a 1.1 V core supply. It can accommodate all pin-compatible ECP5 devices
in the 381 ball caBGA package. A complete description of this device can be found in FPGA-DS-02012, ECP5
Family Data Sheet.
Note: The connections referenced in
this document refer to the LFE5UM-45F-8BG381C device.
Applying Power to the Board
The ECP5 Versa Development Board is ready to power on. The board can be supplied with power from a PCI
Express host system or standalone with an external wall power module.
The 12 V DC input power source is fused with a surface mounted fuse, as noted in Ta bl e 1.
Table 1. Board Power Supply Fuses (
See Appendix A, Sheet 2, Figure 11- Voltage Regulators)
Fuse Designator Description
F1 12 V Input Supply Fuse
The board may be plugged into a host PC. Only plug the board into a PCI Express slot when the system is powered
off. Once inserted, the PC can be safely powered on.
Using the evaluation board outside of a PC chassis supply r
equires the factory-supplied wall supply module. Use of
other supplies is not suggested.
Figure 2. Power Distribution Scheme (
See Appendix A, Sheet 2, Figure 11- Voltage Regulators)
12 V, 5 A fused
Status LED: D13
VCC Core: 1.1 V, 1.35 A
Status LED: D10
1.5 V, 1.1 A
Status LED: D11
3.3 V, 1.35 A
Status LED: D9
2.5 V, 1.1 A
Status LED: D31
SERDES VCCHTX0: 1.1 V, 0.5 A
SERDES VCCA0: 1.1 V, 0.5 A
Status LED: D12
SW
EN
SW
EN
LDO
SW
EN
SW
EN
LDO