July 2017 Technical Note TN1204
www.latticesemi.com 1 TN1204_3.9
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or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
Introduction
The MachXO2™ is an SRAM-based Programmable Logic Device that includes an internal Flash memory which
makes the MachXO2 appear to be a non-volatile device. The MachXO2 provides a rich set of features for program-
ming and configuration of the FPGA. You have many options available to you for building the programming solution
that fits your needs. Each of the options available will be described in detail so that you can put together the pro-
gramming and configuration solution that meets your needs.
MachXO2 Features
Key programming and configuration features of MachXO2 devices are:
• Instant-on configuration from internal Flash PROM – powers up in milliseconds
• Single-chip, secure solution
• Multiple programming and configuration interfaces:
— 1149.1 JTAG
— Self download
— Slave SPI
— Master SPI
— Dual Boot
— I
2
C
— WISHBONE bus
• User Flash Memory (UFM) for non-volatile data storage:
— Configuration Flash memory overflow
— EBR Initialization data
— Application specific data
• Transparent programming of non-volatile memory
• Optional dual boot with external SPI memory
• Optional security bits for design protection
MachXO2 Programming and
Configuration Usage Guide
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