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Lexicon MPX-1 - Interrupt Priorities and Modes

Lexicon MPX-1
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MCS·80f8S™
Mode
When programmed in the
MCS·80185
mode, the 8259A
should only be used
within
an 8080A or
an
8085A
system. In this mode the 8080AI8085A will handle inter-
rupts in the format described in the
"MCS-80-8259A
or
MCS·85-8259A
Overviews."
Upon interrupt request in the MCS·80/85 mode, the
8259A will
output
to
the data bus the opcode for a CALL
instruction
and the address
of
the desired routine, This
is in response
to
a sequence
of
three INTA pulses
issued
by the 8080AJ8085A after the 8259A has raised
INT high.
The first INTA pulse to the 8259A enables the CALL
opcode "CO
H"
onto
the data bus. It also resolves
IR
pri·
orities and
effects
operation in the cascade mode,
which will be covered later. Contents of the first
interrupt-vector byte are shown in Figure 9A.
During the second and third INTA pUlses,
the 8259A
conveys a 16-bit interrupt-vector address
to
the 8080AI
8085A. The interrupt-vector addresses for all eight levels
are selected when
initially
programming the 8259A.
However, only one address is needed for programming.
Interrupt·vector addresses
of
IRO-IR7 are automatically
set
at
equally spaced intervals based on the one pro·
grammed address. Address intervals are user definable
to
4 or 8 bytes apart.
If
the service routine for a device is
short it may be possible
to
fit
the entire routine
within
an 8·byte interval. Usually, though, the service routines
require more than 8 bytes. So, a 4-byte interval is used
to
store a Jump (JMP)
instruction
which directs the 8080AI
8085A
to
the appropriate routine. The 8-byte interval
maintains
compatibility
with
current
8080A/8085A
Restart
(AST)
instruction
software, while the 4·byte in·
terval is best for a compact
jump
table.
If
the
".pyte
in·
terval is selected, then the 8259A
will
automatically
insert
bits
AO-A4. This leaves A5-A15
to
be pro-
grammed by the user. If the 8-byte interval is selected,
the 8259A
will
automatically insert
bits
AO-A5, This
leaves only A6-A15
to
be programmed by the user.
The LSB
of
the interrupt-vector address is placed on the
data bus during the second INTA pulse. Figure
98
shows
the contents
of
the second interrupt-vector byte
for
both 4 and 8-byte intervals.
MCS-88I88
TIl
Mode
When programmed in the MCS-86/88 mode, the 8259A
should only be used
within
an MCS·86
or
MCS·88
system, In this mode, the
808618088
will
handle inter-
rupts in the format described earlier in the
"8259A-
8086/B088 Overview".
Upon interrupt in
the
MCS·86188
mode, the 8259A will
output
a single interrupt,vecjor byte
to
the data bus.
This is in response
to
only
two
INTA pulses issued by
the
808618088
after the 8259A has raised INT high.
The first INTA pulse is used only
for
set-up purposes in-
ternal
to
the 8259A. As in the MCS·80/85 mode,
this
set·
up includes priority resolution and cascade mode oper·
ations which will be covered later. Unlike the
MCS·80185
mode, no CALL opcode is placed on the data bus.
40
The MSB of the interrupt-vector address is placed on the
data bus during the
third
INTA pulse. Contents of the
third
interrupt-vector byte is shown
In
Figure
9C
A. FIRST INTERRUPT VECTOR IYTE, MCSIOIIS MOOE
07
DI
os
1M
03
02
01
DO
CALL CODE
IL..._,
O
__
O
--O---,
~l
I.
SECOND INTERRUPT VECTOR IYTE. MCSIO/IS MODE
."
1"I.",e'·
07
De
OS
1M
03
02
01
DO
7
1.7
A6
A!>
1
,
,
0
0
I
1.7
A6
A!>
,
,
0
0
0
!>
A7
AI
A!>
,
0
,
0 0
1.7
AI
A!>
,
0 0
0 0
3
1.7
AI
A!>
0
1
,
0 0
2
1.7
A6
A!>
0
,
0
0
0
,
1.7
AI
A!>
0 0
,
0 0
0
1.7
A6
A!>
0
0
0 0 0
I"
''''.",e'.1
D7
De
D5
1M
03
D2
D,
00
7
A7
1.6
, ,
,
0 0 0
6
A1
1.6
, ,
0
0
0
0
!>
1.1
A6
,
0
,
0 0
0
1.7
1.6
,
0
0 0
0
0
j
3
A7
AI
0
I
,
0 0
0
2
A7
A6
0
I
0 0
0
0
,
,
A7
A6
0
0
,
0
0
0
I
0
..1
AI
0
0 0
0
0 0
C.
THIRD INTERRUPT VECTOR IYTE, MCSI0185 MODE
07
De
05
1M
_0_3_
.......
_0_2
-..,._D_'
-.._00---,
~
AI3
"'2
,_,,_,_,
~1_A_'_O~_A_9__'__
..
8......J
Figure
II.
IIA-C. ''''errupt·Vector
By'll
lor
12!>1A.
MCS
10115
Mode
The second INTA pulse
is
used
to
enable the single
interrupt·vector byte
onto
the data bus. The
80861a088
uses
this
interrupt·vector byte
to
select one
01
256 inter·
rupt
"types"
in
80B6/8088
memory. Interrupt type selec·
tion
lor
all eight IR levels is made when initially pro·
gramming the 8259A. However, reference
to
only one
In'
terrupt type is needed
lor
programming. The upper 5 bits
of
the interrupt vector byte are user definable. The lower
3
bits
are automatically inserted by the 8259A depend·
ing upon the IA level.
Contents
01
the interrupt·vector byte for 8086/B088 type
selection is put on the data bus during the second INTA
pulse and is shown in Figure
10.

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