LG FA163 - Page 18

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Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
AIN1A
AIN1B
11
12
Stereo Analog Input 1 (Input) - The full-scale level is specified in the ADC Analog Characteristics
specification table.
AGND 13 Analog Ground (Input) - Ground reference for the internal analog section.
VA 14 Analog Power (Input) - Positive power for the internal analog section.
AFILTA 15 Antialias Filter Connection (Output) - Antialias filter connection for the channel A ADC input.
AFILTB 16 Antialias Filter Connection (Output) - Antialias filter connection for the channel B ADC input.
VQ 17 Quiescent Voltage (Output) - Filter connection for the internal quiescent reference voltage.
TSTO 18 Test Pin (Output) - This pin must be left unconnected.
FILT+ 19 Positive Voltage Reference (Output) - Positive reference voltage for the internal sampling circuits.
TSTO 20 Test Pin - This pin must be left unconnected.
AIN4A/MICIN1
AIN4B/MICIN2
21
22
Stereo Analog Input 4 / Microphone Input 1 & 2 (Input) - The full-scale level is specified in the ADC
Analog Characteristics specification table.
AIN5A
AIN5B
23
24
Stereo Analog Input 5 (Input) - The full-scale level is specified in the ADC Analog Characteristics
specification table.
MICBIAS 25
Microphone Bias Supply
(Output) - Low-noise bias supply for external microphone. Electrical charac-
teristics are specified in the DC Electrical Characteristics specification table.
AIN6A
AIN6B
26
27
Stereo Analog Input 6 (Input) - The full-scale level is specified in the ADC Analog Characteristics
specification table.
PGAOUTA
PGAOUTB
28
29
PGA Analog Audio Output (Output) - Either an analog output from the PGA block or high impedance.
See ìPGAOut Source Select (Bit 6)î on page 33.
VA 30 Analog Power (Input) - Positive power for the internal analog section.
AGND
31
32
Analog Ground (Input) - Ground reference for the internal analog section.
NC
33
34
No Connect - These pins are not connected internally and should be tied to ground to minimize any
potential coupling effects.
TSTO 35 Test Pin (Output) - This pin must be left unconnected.
VLS 36
Serial Audio Interface Power (Input) - Determines the required signal level for the serial audio inter-
face. Refer to the Recommended Operating Conditions for appropriate voltages.
TSTI 37 Test Pin (Input) - This pin must be connected to ground.
NC
38,
39,
40
No Connect - These pins are not connected internally and should be tied to ground to minimize any
potential coupling effects.
SDOUT 41 Serial Audio Data Output (Output) - Output for twoís complement serial audio data.
SCLK 42 Serial Clock (Input/Output)
- Serial clock for the serial audio interface.
LRCK 43
Left Right Clock (Input/Output) - Determines which channel, Left or Right, is currently active on the
serial audio data line.
MCLK 44 Master Clock (Input/Output) - Clock source for the ADCís delta-sigma modulators.
DGND 45 Digital Ground (Input) - Ground reference for the internal digital section.
VD 46 Digital Power (Input) - Positive power for the internal digital section.
INT 47 Interrupt (Output) - Indicates an interrupt condition has occurred.
OVFL 48 Overflow (Output) - Indicates an ADC overflow condition is pres
ent.
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