LG FA163 - Page 28

3-13
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
8. MLC3895_DSP
• PIN CONFIGURATION
PLL
PWM
Modulator
Internal Controls
MLRCK
MBCK
MSDIN[0:3]
SCK/SCL
SO/SDA
SI/I2C_AD0
/
CS/I2C_AD2
PWM2_P/M
PWM3_P/M
PWM4_P/M
PWM5_P/M
PWM6_P
/M
/RESET
OVERLOAD
EXT_MUTE
PWM1_P/M
PWM8_P/M
Internal Clock
SPI/I2C
PWM7_P/M
SLRCK
SBCK
SSDIN[0:3]
PWM_HP_R_P/M
PWM_HP_L_P/M
EPD_ENA
PWM_
SWL_P/M
MIC_LRCK
MIC_BCK
MIC_SDIN
MIC_MC
LK
DMIX_MCLK
OLRCK
OBCK
DMIX_S
DOUT
PLL_DVDD
PLL_DVSS
PLL_AVDD
PLL_AVSS
DVDD
DVSS
IO_VDD
IO_V
SS
Power Supply
Reset & Po
wer Down
Internal Reset
Serial Audio
Output
interfac
e
Automatic
Gain
Limiter
Main
Volum
e
Trim
Volume
Bass
Manager
EQ
Down
Mixe
r
Mixe
r
Mic.
Input
Processo
r
Input
Mapper
Sample
Rate
Converte
r
Input
&
Output
MUX
Host
Interface
(I
2
C, SPI)
Serial
Audio
Output
inter
face
Output Mapper
POP
NR
Crystal
Oscillator
XI N
XO
UT
9. PS9830B
• FUNCTIONAL BIOCK DIAGRAM
jomi