LG Flatron L1510S - Pin Configuration

PIN CONFIGURATION
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CAT24WC08J-TE13 8P
MC74HCT14ADR2 14P
A
0
A
1
A
2
V
SS
V
CC
WP
SCL
SDA
A
0
A
1
A
2
V
SS
V
CC
WP
SCL
SDA
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
A
0
A
1
A
2
V
SS
V
CC
WP
SCL
SDA
1
2
3
4
8
7
6
5
EXTERNAL LOAD
SDA
WP
D
OUT
SENSE AMPS
SHIFT REGISTERS
WORD ADDRESS
BUFFERS
COLUMN
DECODERS
START/STOP
LOGIC
XDEC
DATA IN STORAGE
HIGH VOLTAGE/
TIMING CONTROL
STATE COUNTERS
SLAVE
SCL
A
0
A
1
V
CC
V
SS
A
2
ADDRESS
COMPARATORS
CONTROL
LOGIC
ACK
E PROM
2
PIN CONFIGURATION
DIP Package(p) SOIX Package(J)
TSSOP Package(U)
BLOCK DIAGRAM
PIN FUNCTION
Pin Name
A0, A1, A2
SDA
SCL
WP
Vcc
Vss
Function
Device Adress Inputs
Serial Data/Address
Serial Clock
Write Protect
+1.8V to + 6.0V power Supply
Ground
V
A1
Y1
AS
A2
Y6
Y2
A5
A3
Y5
Y3
A4
GND
Y4
CC
1
2
3
4
5
6
7
14
13
12
11
10
9
8
12
A1 Y1
34
A2 Y2
56
A3 Y3
98
A4 Y4
11 10
A5 Y5
13 12
A6
PIN 14=V
PIN 7=GND
CC
Y6
PIN CONFIGURATION
BLOCK DIAGRAM