Linear Technology LTC6804-1 - Pin Functions

LTC6804-1/LTC6804-2
17
680412fc
For more information www.linear.com/LTC6804-1
pin FuncTions
C0 to C12: Cell Inputs.
S1 to S12: Balance Inputs/Outputs. 12 N-MOSFETs are
connected between S(n) and C(n – 1) for discharging cells.
V
+
: Positive Supply Pin.
V
–
: Negative Supply Pins. The V
–
pins must be shorted
together, external to the IC.
V
REF2
: Buffered 2nd reference voltage for driving multiple
10k thermistors. Bypass with an external 1µF capacitor.
V
REF1
: ADC Reference Voltage. Bypass with an external
1µF capacitor. No DC loads allowed.
GPIO[1:5]: General Purpose I/O. Can be used as digital
inputs or digital outputs, or as analog inputs with a mea
-
surement range from V
–
to 5V. GPIO [3:5] can be used
as an I
2
C or SPI port.
SWTEN: Software Timer Enable. Connect this pin to V
REG
to enable the software timer.
DRIVE: Connect the base of an NPN to this pin. Connect
the collector to V
+
and the emitter to V
REG
.
V
REG
: 5V Regulator Input. Bypass with an external 1µF
capacitor.
ISOMD: Serial Interface Mode. Connecting ISOMD to
V
REG
configures Pins 41 to 44 of the LTC6804 for 2-wire
isolated interface (isoSPI) mode. Connecting ISOMD to
V
–
configures the LTC6804 for 4-wire SPI mode.
WDT: Watchdog Timer Output Pin. This is an open drain
NMOS digital output. It can be left unconnected or con
-
nected with a 1M resistor to V
REG
. If the LTC6804 does not
receive a wake-up signal (see Figure 21) within 2 seconds,
the watchdog timer circuit will reset the LTC6804 and the
WDT pin will go high impedance.
Serial Port Pins
LTC6804-1
(DAISY-CHAINABLE)
LTC6804-2
(ADDRESSABLE)
ISOMD = V
REG
ISOMD = V
–
ISOMD = V
REG
ISOMD = V
–
PORT B
(Pins 45
to 48)
IPB IPB A3 A3
IMB IMB A2 A2
ICMP ICMP A1 A1
IBIAS IBIAS A0 A0
PORT A
(Pins 41
to 44)
(NC) SDO IBIAS SDO
(NC) SDI ICMP SDI
I
PA SCK I
PA SCK
IMA CSB IMA CSB
CSB, SCK, SDI, SDO: 4-Wire Serial Peripheral Interface
(SPI). Active low chip select (CSB), serial clock (SCK),
and serial data in (SDI) are digital inputs. Serial data out
(SDO) is an open drain NMOS output pin. SDO requires
a 5k pull-up resistor.
A0 to A3: Address Pins. These digital inputs are connected
to V
REG
or V
–
to set the chip address for addressable se-
rial commands.
IPA, IMA
: Isolated 2-Wire Serial Interface Port A. IPA
(plus) and IMA (minus) are a differential input/output pair.
IPB, IMB: Isolated 2-Wire Serial Interface Port B. IPB
(plus) and IMB (minus) are a differential input/output pair.
IBIAS: Isolated Interface Current Bias. Tie IBIAS to
V
–
through a resistor divider to set the interface output
current level. When the isoSPI interface is enabled, the
IBIAS pin voltage is 2V. The IPA/IMA or IPB/IMB output
current drive is set to 20 times the current, I
B
, sourced
from the IBIAS pin.
ICMP: Isolated Interface Comparator Voltage Threshold
Set. Tie this pin to the resistor divider between IBIAS
and V
–
to set the voltage threshold of the isoSPI receiver
comparators. The comparator thresholds are set to 1/2
the voltage on the ICMP pin.