Linear Technology LTC6804-1 - Serial Interface Overview

LTC6804-1/LTC6804-2
35
680412fc
For more information www.linear.com/LTC6804-1
operaTion
Table 19. I
2
C Master Timing
I
2
C MASTER
PARAMETER
TIMING RELATIONSHIP
TO PRIMARY SPI
INTERFACE
TIMING
SPECIFICATIONS AT
t
CLK
= 1µs
SCL Clock Frequency 1/(2 • t
CLK
) Max 500kHz
t
HD
; STA t
3
Min 200ns
t
LOW
t
CLK
Min 1µs
t
HIGH
t
CLK
Min 1µs
t
SU
; STA t
CLK
+ t
4
* Min 1.03µs
t
HD
; DAT t
4
* Min 30ns
t
SU
; DAT t
3
Min 1µs
t
SU
; STO t
CLK
+ t
4
* Min 1.03µs
t
BUF
3 • t
CLK
Min 3µs
*Note: When using isoSPI, t
4
is generated internally and is a minimum of
30ns. Also, t
3
= t
CLK
– t
4
. When using SPI, t
3
and t
4
are the low and high
times of the SCK input, each with a specified minimum of 200ns.
Table 20. SPI Master Timing
SPI MASTER PARAMETER
TIMING RELATIONSHIP
TO PRIMARY SPI
INTERFACE
TIMING
SPECIFICATIONS
AT t
CLK
= 1µs
SDIOM Valid to SCKM
Rising Setup
t
3
Min 200ns
SDIOM Valid from SCKM
Rising Hold
t
CLK
+ t
4
* Min 1.03µs
SCKM Low t
CLK
Min 1µs
SCKM High t
CLK
Min 1µs
SCKM Period (SCKM_Low
+ SCKM_High)
2 • t
CLK
Min 2µs
CSBM Pulse Width 3 • t
CLK
Min 3µs
SCKM Rising to CSBM
Rising
5 • t
CLK
+ t
4
* Min 5.03µs
CSBM Falling to SCKM
Falling
t
3
Min 200ns
CSBM Falling to SCKM
Rising
t
CLK
+ t
3
Min 1.2µs
SCKM Falling to SDIOM
Valid
Master requires < t
CLK
*Note: When using isoSPI, t
4
is generated internally and is a minimum of
30ns. Also, t
3
= t
CLK
– t
4
. When using SPI, t
3
and t
4
are the low and high
times of the SCK input, each with a specified minimum of 200ns.
Timing Specifications of I
2
C and SPI master
The timing of the LTC6804 I
2
C or SPI master will be
controlled by the timing of the communication at the
LTC6804’s primary SPI interface. Table 19 shows the
I
2
C master timing relationship to the primary SPI clock.
Table20 shows the SPI master timing specifications.
There are two versions of the LTC6804: the LTC6804-1
and the LTC6804-2. The LTC6804-1 is used in a daisy
chain configuration, and the LTC6804-2 is used in an
addressable bus configuration. The LTC6804-1 provides
a second isoSPI interface using pins 45 through 48. The
LTC6804-2 uses pins 45 through 48 to set the address of
the device, by tying these pins to V
–
or V
REG
.
SERIAL INTERFACE OVERVIEW
There are two types of serial ports on the LTC6804, a
standard 4-wire serial peripheral interface (SPI) and a
2-wire isolated interface (isoSPI). Pins 41 through 44 are
configurable as 2-wire or 4-wire serial port, based on the
state of the ISOMD pin.