Linear Technology LTC6804-1 - Page 19

LTC6804-1/LTC6804-2
19
680412fc
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block DiagraM
SDO/(IBIAS)
C12
C11
C10
C9
C8
C7
C0
C6
C5
C4
C3
C2
C1
–
+
680412 BD2
A4
P
A3
A2
A1
SDI/(ICMP)
SCK/(IPA)
CSB/(IMA)
ISOMD
WDT
DRIVE
SWTEN
GPIO5
GPIO4
GPIO3
GPIO2
GPIO1
C0
S1
C12
S12
C11
M
S11
C10
S10
C9
S9
C8
S8
C7
S7
C6
S6
C5
S5
C4
S4
C3
S3
C2
S2
C1
LOGIC
AND
MEMORY
DIGITAL
FILTERS
SERIAL I/O
ADDRESS
6-CELL
MUX
V
REGD
SOC
V
REG
P
M
AUX
MUX
P
M
6-CELL
MUX
POR
V
REGD
V
REG
SERIAL I/O
PORT A
SOFTWARE
TIMER
DIE
TEMPERATURE
2ND
REFERENCE
1ST
REFERENCE
REGULATORS
ADC2
–
+
ADC1
V
+
LDO1
V
REGD
POR
V
+
LDO2
DRIVE
V
REG
V
REF1
V
REF2
V
–
V
–
*
V
+
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
16
16
12 BALANCE FETs
S(n)
C(n – 1)
LTC6804-2