Linear Technology LTC6804-1 - Page 41

LTC6804-1/LTC6804-2
41
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operaTion
Table 21. isoSPI Pulse Types
PULSE TYPE
FIRST LEVEL
(t
1/2PW
)
SECOND LEVEL
(t
1/2PW
) ENDING LEVEL
Long +1 +V
A
(150ns) –V
A
(150ns) 0V
Long –1 –V
A
(150ns) +V
A
(150ns) 0V
Short +1 +V
A
(50ns) –V
A
(50ns) 0V
Short –1 –V
A
(50ns) +V
A
(50ns) 0V
A host microcontroller does not have to generate isoSPI
pulses to use this 2-wire interface. The first LTC6804 in
the system can communicate to the microcontroller using
the 4-wire SPI interface on its Port A, then daisy-chain to
other LTC6804s using the 2-wire isoSPI interface on its
Port B. Alternatively, an LTC6820 can be used to translate
the SPI signals into isoSPI pulses.
LTC6804-1 Operation with Port A Configured for SPI
When the LTC6804-1 is operating with port A as an SPI
(ISOMD = V
–
), the SPI detects one of four communication
events: CSB falling, CSB rising, SCK rising with SDI = 0,
and SCK rising with SDI = 1. Each event is converted into
one of the four pulse types for transmission through the
LTC6804-1 daisy chain. Long pulses are used to transmit
CSB changes and short pulses are used to transmit data,
as explained in Table 22.
Table 22. LTC6804-1 Port B (Master) isoSPI Port Function
COMMUNICATION EVENT
(PORT A SPI)
TRANSMITTED PULSE
(POR
T B isoSPI)
CSB Rising Long +1
CSB Falling Long –1
SCK Rising Edge, SDI = 1 Short +1
SCK Rising Edge, SDI = 0 Short –1
On the other side of the isolation barrier (i.e. at the other
end of the cable), the 2nd LTC6804 will have ISOMD =
V
REG
. Its Port A operates as a slave isoSPI interface. It
receives each transmitted pulse and reconstructs the
SPI signals internally, as shown in Table 23. In addition,
during a READ command this port may transmit return
data pulses.
Table 23. LTC6804-1 Port A (Slave) isoSPI Port Function
RECEIVED PULSE
(PORT A isoSPI)
INTERNAL SPI
PORT ACTION RETURN PULSE
Long +1 Drive CSB High None
Long –1 Drive CSB Low
Short +1 1. Set SDI = 1
2. Pulse SCK
Short –1 Pulse if Reading a 0 bit
(No Return Pulse if Not in READ
Mode or if Reading a 1 bit)
Short –1
1. Set SDI = 0
2. Pulse SCK
Figure 19. isoSPI Pulse Detail
+V
TCMP
+V
A
–V
TCMP
V
IP
– V
IM
+1 PULSE
–V
A
t
1/2PW
t
INV
t
1/2PW
+V
TCMP
+V
A
–V
TCMP
V
IP
– V
IM
–V
A
t
1/2PW
t
INV
t
1/2PW
680412 F19
–1 PULSE