Linear Technology LTC6804-1 - Page 51

LTC6804-1/LTC6804-2
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operaTion
Table 36. Configuration Register Group
REGISTER RD/WR BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
CFGR0 RD/WR GPIO5 GPIO4 GPIO3 GPIO2 GPIO1 REFON SWTRD ADCOPT
CFGR1 RD/WR VUV[7] VUV[6] VUV[5] VUV[4] VUV[3] VUV[2] VUV[1] VUV[0]
CFGR2 RD/WR VOV[3] VOV[2] VOV[1] VOV[0] VUV[11] VUV[10] VUV[9] VUV[8]
CFGR3 RD/WR VOV[11] VOV[10] VOV[9] VOV[8] VOV[7] VOV[6] VOV[5] VOV[4]
CFGR4 RD/WR DCC8 DCC7 DCC6 DCC5 DCC4 DCC3 DCC2 DCC1
CFGR5 RD/WR DCTO[3] DCTO[2] DCTO[1] DCTO[0] DCC12 DCC11 DCC10 DCC9
Table 37. Cell Voltage Register Group A
REGISTER RD/WR BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
CVAR0 RD C1V[7] C1V[6] C1V[5] C1V[4] C1V[3] C1V[2] C1V[1] C1V[0]
CVAR1 RD C1V[15] C1V[14] C1V[13] C1V[12] C1V[11] C1V[10] C1V[9] C1V[8]
CVAR2 RD C2V[7] C2V[6] C2V[5] C2V[4] C2V[3] C2V[2] C2V[1] C2V[0]
CVAR3 RD C2V[15] C2V[14] C2V[13] C2V[12] C2V[11] C2V[10] C2V[9] C2V[8]
CVAR4 RD C3V[7] C3V[6] C3V[5] C3V[4] C3V[3] C3V[2] C3V[1] C3V[0]
CVA
R5 RD C3V[15]
C3V[14] C3V[13] C3V[12] C3V[11] C3V[10] C3V[9] C3V[8]
Table 38. Cell Voltage Register Group B
REGISTER RD/WR BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
CVBR0 RD C4V[7] C4V[6] C4V[5] C4V[4] C4V[3] C4V[2] C4V[1] C4V[0]
CVBR1 RD C4V[15] C4V[14] C4V[13] C4V[12] C4V[11] C4V[10] C4V[9] C4V[8]
CVBR2 RD C5V[7] C5V[6] C5V[5] C5V[4] C5V[3] C5V[2] C5V[1] C5V[0]
CVBR3 RD C5V[15] C5V[14] C5V[13] C5V[12] C5V[11] C5V[10] C5V[9] C5V[8]
CVBR4 RD C6V[7] C6V[6] C6V[5] C6V[4] C6V[3] C6V[2] C6V[1] C6V[0]
CVBR5 RD C6V[15] C6V[14] C6V[13] C6V[12] C6V[11] C6V[10] C6V[9] C6V[8]
Table 39. Cell Voltage Register Group C
REGISTER RD/WR BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
CVCR0 RD C7V[7] C7V[6] C7V[5] C7V[4] C7V[3] C7V[2] C7V[1] C7V[0]
CVCR1 RD C7V[15] C7V[14] C7V[13] C7V[12] C7V[11] C7V[10] C7V
[9] C7V[8]
CVCR2 RD
C8V[7] C8V[6] C8V[5] C8V[4] C8V[3] C8V[2] C8V[1] C8V[0]
CVCR3 RD C8V[15] C8V[14] C8V[13] C8V[12] C8V[11] C8V[10] C8V[9] C8V[8]
CVCR4 RD C9V[7] C9V[6] C9V[5] C9V[4] C9V[3] C9V[2] C9V[1] C9V[0]
CVCR5 RD C9V[15] C9V[14] C9V[13] C9V[12] C9V[11] C9V[10] C9V[9] C9V[8]
Table 40. Cell Voltage Register Group D
REGISTER RD/WR BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
CVDR0 RD C10V[7] C10V[6] C10V[5] C10V[4] C10V[3] C10V[2] C10V[1] C10V[0]
CVDR1 RD C10V[15] C10V[14] C10V[13] C10V[12] C10V[11] C10V[10] C10V[9] C10V[8]
CVDR2 RD C11V[7] C11V[6] C11V[5] C11V[4] C11V[3] C11V[2] C11V[1] C11V[0]
CVDR3 RD C11V[15] C11V[14] C11V[13] C11V[12] C11V[11] C11V[10] C11V[9] C11V[8]
CVDR4 RD C12V[7] C12V[6] C12V[5] C12V[4] C12V[3] C12V[2] C12V[1
] C12V[0]
CVDR5 RD
C12V[15] C12V[14] C12V[13] C12V[12] C12V[11] C12V[10] C12V[9] C12V[8]