2221
IC22:TC9164AF
6. IC DATA
Pin Assignment
Pin Function
LEVEL SHIFTER
2
1
2
3
4
1
5
6
2
7
8
3
1
2
3
4
1
5
6
2
7
8
3
1
3
4
5
6
7
8
9
10
14 28
11
12
13
27
26
25
24
23
22
21
20
19
18
17
16
15
LATCH CIRCUIT
SHIFT REGISTER
LEVEL SHIFTER
LATCH CIRCUIT
L-S R-S
Vss GND VDD
L-S
L-S
L-S
L-COM
L-S
L-S
L-COM
L-S
L-S
L-COM
ST
R-S
R-S
R-S
R-COM
R-S
R-S
R-COM
R-S
R-S
R-COM
DATA
CK
LEVEL SHIFTER
2
1
2
3
1
4
5
6
2
7
8
3
1
2
3
1
4
5
6
2
7
8
3
1
3
4
5
6
7
8
9
10
14 28
11
12
13
27
26
25
24
23
22
21
20
19
18
17
16
15
LATCH CIRCUIT
SHIFT REGISTER
LEVEL SHIFTER
LATCH CIRCUIT
L-S R-S
Vss GND VDD
L-S
L-S
L-COM
L-S
L-S
L-S
L-COM
L-S
L-S
L-COM
ST
R-S
R-S
R-COM
R-S
R-S
R-S
R-COM
R-S
R-S
R-COM
DATA
CK
PIN No. SYMBOL I/O DESCRIPTION
1 OUT4 O
2 OUT3 O Port Output
3 OUT2 O
4 OUT1 O
5 AVDD
- Analog Positive Power Suppoy Port(+6.8V)
7 GNDS
-
10 GNDC - Connect to analog GND
12 GNDR
-
14 GNDL -
6 SW IN I
8 SR IN I Volume Input Port
9 SL IN I
11 C IN I
36 SW OUT O
35 SR OUT O Volume Output Port
34 SL OUT O
33 C OUT O
13 R IN I Tone Input Port
15 L IN I
16 BYPASS R I L,R Volume Input Port(in Bypass Mode)
17 BYPASS L I
31 L OUT O L Output Port
32 R OUT O R Output Port
18 LTRE
- Tone Treble Cycle Control Port
25 RTRE
-
19 LBASS3 -
24 RBASS3 -
20 LBASS2 - Tone Bass Cycle Control Port
23 RBASS2
-
21 LBASS1 -
26 RBASS1 -
22 CR2 O Tone Output Port
28 CL2 O
27 CR1 I L,R Volume Input Port
29 CL1 I
31 LOUT O L Output Port
32 ROUT O R Output Port
30 AVSS
- Analog Negative Power Suppoy Port(-6.8V)
37 AGND
- Analog GND
38 DGND
- Digital GND
39 LATCH I Latch Input Port
40 DATA I Data Input Port
41 CLK I Clock Input Port
42 DVDD
- Digital Power Supply Port(+5V)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
OUT4
volume
MCU I/F
OUTPUT
PORT
OUT3
OUT2
OUT1
AVDD
SWin
GNDS
SRin
SLin
GNDC
Cin
GNDR
Rin
GNDL
Lin
BYPASSR
BYPASSL
LTRE
LBASS3
LBASS2
LBASS1
C in
Cout
SWout
SLout
SRout
Lout
LATCH DATA CLK
µ-com
interface
Rout
SW in
SL in
SR in
BYPASS1
BYPASS2
L in
R in
DVDD
CLK
DATA
LATCH
DGND
AGND
SWout
SRout
SLout
Cout
Rout
Lout
AVss
CL1
CL2
CR1
CR2
RTRE
RBASS3
RBASS2
RBASS1
34
35
36
37
38
39
40
41
42
33
32
31
30
29
28
27
26
25
24
23
22
volume
volume
volume
tone tone
volume
volume
volume
volume
tone
SAA6579
0.1 ∝F
ANTI-
ALIASING
FILTER
57 kHz
BANDPASS
(8th ORDER)
RECONSTRUCTION
FILTER
OSCILLATOR
AND
DIVIDER
CLOCKED
COMPARATOR
COSTAS LOOP
VARIABLE AND
FIXED DIVIDER
CLOCK
REGENERATION
AND SYNC
BIPHASE
SYMBOL
DECODER
DIFFERENTIAL
DECODER
TEST LOGIC AND OUTPUT
SELECTOR SWITCH
REFERENCE
VOLTAGE
2.2 ∝F
4
7
8
5
3
6
V
DDA
V
ref
V
P1
13
14
QUAL
RDDA
RDCL
T57
QUALITY BIT
GENERATOR
1
2
15
16
11
12
2.2 k
Ω
82 pF
47 pF
4.332/8.664 MHz
MPX
signal
330 pF
9
10
MODE TEST
560 pF
MEH162
V
SSD
V
DDD
+5 V
+5 V
OSCOOSCI
MUX
SCOUT
CIN
0.1 ∝F
V
SSA
Via pin MODE two different crystal frequencies can be used.
MODE CRYSTAL CLOCK
LOW 4.332 MHz
HIGH 8.664 MHz
SYMBOL PIN DESCRIPTION
QUAL 1 quality indication output
RDDA 2 RDS data output
V
ref
3 reference voltage output (0.5V
DDA
)
MUX 4 multiplex signal input
V
DDA
5 +5 V supply voltage for analog part
V
SSA
6 ground for analog part (0 V)
CIN 7 subcarrier input to comparator
SCOUT 8 subcarrier output of reconstruction Þlter
MODE 9 oscillator mode/test control input
TEST 10 test enable input
V
SSD
11 ground for digital part (0 V)
V
DDD
12 +5 V supply voltage for digital part
OSCI 13 oscillator input
OSCO 14 oscillator output
T57 15 57 kHz clock signal output
RDCL 16 RDS clock output
SAA6579
MGD684
1
2
3
4
5
6
7
8
QUAL
RDDA
V
ref
MUX
V
DDA
V
SSA
CIN
SCOUT
RDCL
T57
OSCO
OSCI
V
DDD
V
SSD
TEST
MODE
16
15
14
13
12
11
10
9
IC71:NJM2279
IC24:M62446AFP IC63:SAA6579
Block Diagram
IC23:TC9163AF
Block Diagram
Block Diagram
Block Diagram Block Diagram
Pin Function
Pin Assignment
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