dsPIC33/PIC24 Family Reference Manual
DS30009740B-page 16 2010-2013 Microchip Technology Inc.
5.3 Bias Configurations
dsPIC33/PIC24 family devices have four distinct circuit configurations for LCD Bias generation:
• M0: Regulator with Boost
• M1: Regulator without Boost
• M2: Resistor Ladder with Software Contrast
• M3: Resistor Ladder with Hardware Contrast
5.3.1 M0 (REGULATOR WITH BOOST)
In M0 operation, the LCD charge pump feature is enabled. This allows the regulator to generate
voltages up to +3.6V to the LCD (as measured at LCDBIAS3).
M0 uses a Flyback Capacitor connected between V
LCAP1 and VLCAP2, as well as filter capacitors
on LCDBIAS0 through LCDBIAS3, to obtain the required voltage boost (Figure 5-4). The output
voltage (VBIAS) is the difference of the potential between LCDBIAS3 and LCDBIAS0. It is set by
the BIAS<2:0> bits, which adjust the offset between LCDBIAS0 and V
SS. The Flyback Capacitor
(C
FLY) acts as a charge storage element for large LCD loads. This mode is useful in those cases
where the voltage requirements of the LCD are higher than the microcontroller’s V
DD. It also per-
mits software control of the display’s contrast, by adjustment of the Bias voltage, by changing the
value of the BIASx bits.
M0 supports Static and 1/3 Bias types. Generation of the voltage levels for 1/3 Bias is handled
automatically, but must be configured in software.
M0 is enabled by selecting a valid regulator clock source (CKSEL<1:0> set to any value except
‘00’) and setting the CPEN bit. If a Static Bias type is required, the MODE13 bit must be cleared.
5.3.2 M1 (REGULATOR WITHOUT BOOST)
M1 operation is similar to M0, but does not use the LCD charge pump. It can provide VBIAS up
to the voltage level supplied directly to LCDBIAS3. It can be used in cases where V
DD for the
application is expected to never drop below a level that can provide adequate contrast for the
LCD. The connection of external components is very similar to M0, except that LCDBIAS3 must
be tied directly to V
DD (Figure 5-4).
• The BIAS<2:0> bits can still be used to adjust contrast in software by changing VBIAS. As
with M0, changing these bits changes the offset between LCDBIAS0 and V
SS. In M1, this is
reflected in the change between the LCDBIAS0 and the voltage tied to LCDBIAS3. Thus, if
V
DD should change, VBIAS will also change; where in M0, the level of VBIAS is constant.
• Like M0, M1 supports Static and 1/3 Bias types. Generation of the voltage levels for
1/3 Bias is handled automatically, but must be configured in software. M1 is enabled by
selecting a valid regulator clock source (CKSEL<1:0> set to any value except ‘00’) and
clearing the CPEN bit. If 1/3 Bias type is required, the MODE13 bit should also be set.
Note: When the device is put to Sleep while operating in M0 or M1 mode, make sure that
the Bias capacitors are fully discharged to get the lowest Sleep current.
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