Microtest 6377 - Page 46

6–8
6.1.6.3 Standard Event Status Register
The standard event status register (ESR) contains the 8 bits of the operation status report which
is defined in IEEE 488.2. If one or more event status bit is set to ‘1’ and their enable bits are
also ‘1’, bit 5 (called ESB) of the status register byte is set to ‘1’.
Each bit of the standard event status register is shown below.
BIT
Name
Meaning (True = ‘1’)
7
Power On (PON)
True when the instrument power supply has been turned OFF and
then ON since the last time this register was read.
6
User Request (URQ)
Not used. Always 0.
5
Command Error (CME)
True if the following command errors occur:
An IEEE 488.2 syntax error occurred.
The device received a Group Execute Trigger (GET) inside a
program message.
4
Execution Error (EXE)
True when a parameter following a header of a GPIB command was
evaluated by the instrument as being outside of its legal input range
or is otherwise inconsistent with the instrument’s capabilities.
3
Device Dependent Error
(DDE)
True when any bit is set in the Encoded Message Register.
2
Query Error (QYE)
True when attempting to read data from the output buffer in which no
data was present, or when the data was lost.
1
Request Control (RQC)
Not used. Always 0.
0
Operation Complete (OPC)
True when the instrument has completed all selected pending
operations before sending the *OPC command
Figure 6-6 Standard Event Status Register