144
(3) When error is occurred
At the time of ERROR output, output transistor at ERROR signal will become ON (Negative logic
electrically). Moreover, for each DATA, POL., all of the output transistor will become OFF at the time of
ERROR output (Positive logic electrically).
(4) When the hold signal is input
・ The input operation of HOLD signal is executed after the short circuit for approx. 100 ms or more.
・ At the time of HOLD signal input, the output transistor of P.C. will be OFF condition (Positive logic
electrically). However, as for P.C., OFF condition will be made after one (1) shot of operation.
16-2-10. Output condition
Setting output logic Output data Condition of
transistor
Pin-COM level at
the time of voltage
supply externally.
Negative logic
Yes ON L
No OFF H
Positive logic
Yes OFF H
No ON L
DATA
POL.
P.C.
ERROR
ON ON ON
ON
ONON
ON ONONON
ON
ON
HOLD
P.C.
POL.
DATA
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