Mitsubishi Electric FX3U SERIES - Page 282

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FX3G/FX3U/FX3UC Series Programmable Controllers
Programming Manual - Basic & Applied Instruction Edition
10 Arithmetic and Logical Operation ( + , − , × , ÷ ) – FNC 20 to FNC 29
10.4 FNC 23 – DIV / Division
2. 32-bit operation (DDIV and DDIVP)
[ +1, ] indicates the dividend, [ +1, ] indicates the divisor, the quotient is transferred to
[ +1, ]), and the remainder is transferred to [ +3, +2].
• Four devices in total starting from are occupied to store the operation result (quotient and remainder). Make
sure that these four devices are not used for another control.
• The most significant bit of each data indicates the sign (positive: 0 or negative: 1), and data is divided algebraically.
5500 ÷ (−540) = −10 (quotient) ... 100 (remainder)
• When a constant (K) is specified in [ +1, ] or [ +1, ], it is automatically converted into binary
format.
Related devices
1. Relationship between flag operation and numeric value
*1. Available in all FX3G PLCs and FX3U/FX 3UC PLCs Ver. 2.30 or later.
Cautions
1. Operation result
• The most significant bit of the quotient and remainder indicates the sign (positive: 0, negative: 1) respectively.
• The quotient is negative when either the dividend or divisor is negative.
The remainder is negative when the dividend is negative.
2. Device specified as
• The remainder is not obtained when a bit device is specified with digit specification.
• In a 32-bit operation (by DDIV or DDIVP), Z cannot be specified as .
Error
• When the divisor is "0", an operation error is caused and the instruction is not executed.
• A operation error results when the operation result is over 32,767 (16-bit operation) or 2,147,483,647 (32-bit
operation). (Turns the carry flag ON.)
Device Name Description
M8304*1 Zero
ON : When the operation result is 0.
OFF : When the operation result is a number other than 0.
M8306*1 Carry
ON : Carry flag operates when the operation result is over 32,767 (16-bit operation)
or2,147,483,647 (32-bit operation).
OFF : When the operation result is less than 32,767 (16-bit operation) or 2,147,483,647
(32-bit operation).
S 1 S 1 S 2 S 2
D D D D
Quotient Remainder
BIN BIN
→ [ +1, ] ... [ +3, +2]
32 bits 32 bits
Dividend Divisor
BIN BIN
[ +1, ] ÷ [ +1, ]
32 bits 32 bits
Command
input
FNC 23
DDIV
D 
D  D  D  D 
S 1  S 2  S 1  S 2 
S 1  S 2 
D
S 1 S 1 S 2 S 2
D
D
S 2