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FX3G/FX3U/FX3UC Series Programmable Controllers
Programming Manual - Basic & Applied Instruction Edition
24 Others – FNC181 to FNC189
24.4 FNC188 – CRC / Cyclic Redundancy Check
16-bit conversion mode (while M8161 is OFF)
In this mode, the operation is executed for high-order 8 bits (1 byte) and low-order 8 bits (1 byte) of a device specified
in .
The operation result is stored to one 16-bit device specified in  .
8-bit conversion mode (while M8161 is ON)
In this mode, the operation is executed only for low-order 8 bits (low-order 1 byte) of a device specified by  .
With regard to the operation result, low-order 8 bits (1 byte) are stored to a device specified by  , and high-order
8 bits (1 byte) are stored to a device specified by  +1.
Example:  = D100
 =D0
 n = 6
Device
Contents of target data
8 bits 16 bits
Device storing data for which 
the CRC value is generated
Low-order byte Low-order bits of D100 01H
0301H
High-order byte High-order bits of D100 03H
+1
Low-order byte Low-order bits of D101 03H
0203H
High-order byte High-order bits of D101 02H
+2
Low-order byte Low-order bits of D102 00H
1400H
High-order byte High-order bits of D102 14H
...
...
–
+n/2-1
Low-order byte
–
High-order byte
Device storing the generated 
CRC value
Low-order byte Low-order bits of D0 E4H
41E4H
High-order byte High-order bits of D0 41H
Example:  = D100
 =D0
 n = 6
Device Contents of target data
Device storing data for 
which the CRC value is 
generated
Low-order byte Low-order bits of D100 01H
+1
Low-order byte Low-order bits of D101 03H
+2
Low-order byte Low-order bits of D102 03H
+3
Low-order byte Low-order bits of D103 02H
+4
Low-order byte Low-order bits of D104 00H
+5
Low-order byte Low-order bits of D105 14H
...
–
+n-1
Low-order byte –
Device storing the 
generated CRC value
Low-order byte Low-order bits of D0 E4H
+1
Low-order byte Low-order bits of D1 41H
 
S
 
D
16-bit conversion mode
FNC188
CRC
n
M8161
M8000
Command
input
D 
S 
  S
  D
  S
  S
  S
  S
  D
 
S
 
D
 
D
FNC188
CRC
n
M8161
M8000
8-bit conversion mode
Command
input
D 
S 
  S
  D
  S
  S
  S
  S
  S
  S
  S
  D
  D