609
FX3G/FX3U/FX3UC Series Programmable Controllers
Programming Manual - Basic & Applied Instruction Edition
25 Block Data Operation – FNC190 to FNC199
25.3 FNC194~199 – BKCMP=, >, <, < >, <=, >= / Block Data Compare
21
FNC160-FNC169
Real Time Clock
Control
22
FNC170-FNC179
External Device
23
FNC180
Alternate
Instructions
24
FNC181-FNC189
Others
25
FNC190-FNC199
Block Data
Operation
26
FNC200-FNC209
Character String
Control
27
FNC210-FNC219
Data
Operation 3
28
FNC220-FNC249
Data
Comparison
29
FNC250-FNC269
Data Table
Operation
30
FNC270-FNC275
Ex-Device
Inverter Comms
Explanation of function and operation
1. 16-bit operation (BKCMP=, >, <, <>, <=, >= / BKCMP=P, >P, <P, <>P, <=P, and >=P)
1) "n" 16-bit binary data starting from are compared with "n" 16-bit binary data starting from , and the
comparison result is stored in "n" points starting from .
2) A constant can be directly specified in .
3) The table below shows the comparison result in each instruction:
4) When the comparison result is ON (1) in all of "n" points starting from , M8090 (block comparison signal)
turns ON.
Instruction Comparison result ON (1) condition Comparison result OFF (0) condition
BKCMP=(FNC194)
= <>
BKCMP>(FNC195)
> <=
BKCMP<(FNC196)
< >=
BKCMP<>(FNC197)
<> =
BKCMP<=(FNC198)
<= >
BKCMP>=(FNC199)
>= <
S
1
S
2
D
FNCOOO
*1
BKCMP
*2
Command
input
S
1
S
2
nD
*1 The number out of 194 to 199 is put in "OOO".
*2 The symbol out of "=", ">", "<", "<>", "<=", or
">=" corresponding to the FNC No. is put in
.
S
1
+0
+1
+2
+n-2
+n-1
"n"
points
>
S
2
+0
+1
+2
+n-2
+n-1
"n"
points
D
+0
Comparison result
+1
+2
+n-2
+n-1
"n"
points
K1234
K5678
K7777
K5000
K4321
K5321
K3399
K6543
K5678
K1200
OFF(0)
ON(1)
ON(1)
OFF(0)
ON(1)
*3
*3 An operation example of BKCMP>
(FNC195) instruction is shown here.
S
1
S
1
=
S
2
+0
+1
+2
+n-2
+n-1
"n"
points
D
+0
Comparison result
+1
+2
+n-2
+n-1
"n"
points
K32000
K32000
K4321
K1234
K32000
K5678
ON(1)
OFF(0)
OFF(0)
ON(1)
OFF(0)
*4
*4 An operation example of BKCMP=
(FNC194) instruction is shown
here.
S
1
S
2
S
1
S
2
S
1
S
2
S
1
S
2
S
1
S
2
S
1
S
2
S
1
S
2
S
1
S
2
S
1
S
2
S
1
S
2
S
1
S
2
S
1
S
2
D
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