1 COMMON ITEMS
1.3 MELSEC iQ-R Series Data Link Functions
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*1 The file registers for each local device and program in which the program name is specified cannot be accessed.
*2 For Q12DCCPU-V (Basic mode), select "Use device function" on a C Controller module.
*3 For Q12DCCPU-V, only Q12DCCPU-V (Extended mode) can be accessed.
*4 The extended data register (D) and extended link register (W) can be accessed by the following two methods.
(1): Access by directly specifying the device name of the extended data register (D) and extended link register (W)
(2): Access to the file register (ZR) area assigned to the extended data register (D) and extended link register (W)
*5 Either of the device names can be specified.
*6 This is the device name in QCPU (Q mode), LCPU, and MELSEC-Q series C Controller module.
*7 It is not accessible when using Q00JCPU or Q00UJCPU.
*8 When accessing out of the range of the file register (ZR) area, the value of -1(FFFFH) is sampled.
*9 "": Specify the block number.
*10 "": Specify the network number.
*11 "": Specify the start I/O number 10H.
*12 "": Specify the CPU number (CPU No.1: 0, CPU No.2: 1, CPU No.3: 2, CPU No.4: 3)
*13 Only the mdrRandRLabel/mdrRandWLabel function can be used.
Index register (Z)
Long index register (LZ)
File register (R)
*7
(ZR)
*8
*7
(ER\R)
*9
Link direct device
*10
Link input (J\X)
Link output (J\Y)
Link relay (J\B)
Link special relay (J\SB)
Link register (J\W)
Link special register (J\SW)
Refresh data register (RD)
Module access device Module access device/Intelligent function
module device (U\G)
*11
Multiple CPU shared device (U3E\G)
*12
CPU buffer memory access
device
*12
CPU buffer memory access device
(U3E\G)
CPU buffer memory access device (Fixed
cycle communication area) (U3E\HG)
Global label (GV)
*13
(No device assigned)
Device name (Device)
*1
Access target
(1) (2) (3) (4) (5)
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