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Motorola 700 Series - Page 10

Motorola 700 Series
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viii
Chapter 1 Board Level Hardware Description continued
Optional SCSI Interface........................................................................1-23
SCSI Termination.................................................................................. 1-23
Local Resources ........................................................................................... 1-24
Programmable Tick Timers................................................................. 1-24
Watchdog Timer ...................................................................................1-24
Software-Programmable Hardware Interrupts................................ 1-25
Local Bus Timeout................................................................................ 1-25
Local Bus Arbiter.........................................................................................1-26
Connectors....................................................................................................1-26
Memory Maps ....................................................................................................1-27
Local Bus Memory Map ............................................................................. 1-27
Normal Address Range ....................................................................... 1-27
VMEbus Memory Map............................................................................... 1-33
VMEbus Accesses to the Local Bus.................................................... 1-33
VMEbus Short I/O Memory Map...................................................... 1-33
Chapter 2 Hardware Preparation and Installation
Introduction..........................................................................................................2-1
Unpacking Instructions.......................................................................................2-1
Hardware Preparation.........................................................................................2-1
System Controller Select Header (J1).......................................................... 2-3
IP Bus Clock Header (J11) ............................................................................2-5
SCSI Terminator Enable Header (J12)......................................................... 2-6
SRAM Backup Power Source Select Header (J14) .................................... 2-6
Flash Write Protect Header (J16)................................................................. 2-7
IP Bus Strobe Select Header (J18)................................................................ 2-8
IP DMA Snoop Control Header (J19) .........................................................2-8
EPROM/Flash Configuration Header (J20) .............................................. 2-9
General-Purpose Readable Jumpers Header (J21)..................................2-12
Memory Mezzanine Options..................................................................... 2-13
Installation Instructions ....................................................................................2-14
IP Installation on the MVME162LX.......................................................... 2-15
MVME162LX Installation...........................................................................2-16
System Considerations............................................................................... 2-18

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