Motorola 700 Series - Table 1-5. Local I;O Devices Memory Map

1-30
Board Level Hardware Description
1
Note The IP2 chip on the MVME162LX supports up to four
IP interfaces, designated IP_a through IP_d. The
700/800-series MVME162LX itself accommodates two
IPs: IP_a and IP_b. In the following map, the segments
applicable to IP_c and IP_d are not used in the 700/800-
series MVME162LX.
Table 1-5. Local I/O Devices Memory Map
Address Range Devices Accessed Port
Width
Size Notes
$FFF00000 - $FFF3FFFF Reserved - - 256KB 4
$FFF40000 - $FFF400FF VMEchip2 (LCSR) D32 256B 1, 3
$FFF40100 - $FFF401FF VMEchip2 (GCSR) D32-D8 256B 1, 3
$FFF40200 - $FFF40FFF Reserved - - 3.5KB 4, 5
$FFF41000 - $FFF41FFF Reserved - - 4KB 4
$FFF42000 - $FFF42FFF MC2chip D32-D8 4KB 1
$FFF43000 - $FFF430FF MCECC #1 D8 256B 1, 8
$FFF43100 - $FFF431FF MCECC #2 D8 256B 1, 8
$FFF43200 - $FFF43FFF MCECCs (repeated) - - 3.5KB 1, 5, 8
$FFF44000 - $FFF44FFF Reserved - - 8KB 4
$FFF45000 - $FFF457FF SCC #1 (Z85230) D8 2KB 1, 2
$FFF45800 - $FFF45FFF SCC #2 (Z85230) D8 2KB 1, 2
$FFF46000 - $FFF46FFF LAN (82596CA) D32 4KB 1, 6
$FFF47000 - $FFF47FFF SCSI (53C710) D32-D8 4KB 1
$FFF48000 - $FFF57FFF Reserved - - 64KB 4
$FFF58000 - $FFF5807F IP2 IP_a I/O D16 128B 1
$FFF58080 - $FFF580FF IP2 IP_a ID D16 128B 1
$FFF58100 - $FFF5817F IP2 IP_b I/O D16 128B 1
$FFF58180 - $FFF581FF IP2 IP_b ID Read D16 128B 1