4.2 - 36 MTP700 Portable Radio / Detailed Service Manual TRANSCEIVER 800 MHz
ZMY0131007-O
G
G
G
G
G
G
G
G
G
G
G
G
G
D300
Bypass Caps for REDCAP
REDCAP2
PWR, GND, NC
Address Bus
Bus Control
Data Bus
Audio Codec Port
Clock Output Driver
Bottom, GPIO, JTAG, DEBUG, DATA,STO
QSPI & L1T & BBP
EMUL port
SIM CARD
Internal Core
Core Voltage Convertors
DSP Address visibilty
DSP DATAvisibilty
AND GATE
DNP
NOT GATE
A18
DNP (Do Not Place) List
VCC TRUTH TABLE
R317
MUX_CTRL=1MUX_CTRL=0
SYMBOL
PIN NAME
Gen Port Ctrl Reg (GPCR)
GPCR = xxxxxxxx x11xxx11
Gen Port Ctrl Reg (GPCR)
GPCR = xxxxxxxx x00xxx00
GPCR (Bit7)=1GPCR (Bit7)=0
O
O
O
O
O
I
I
I
NOTE: RESETS FROM THEBOTTOM CONNECTOR WILL ONLYBE POSSIBLE IF
MUX_CTRL =1 AND THE 8-WIRE INTERFACEIS THUS SET TO JTAG MODE
I
CYPRESS 512k x16
LARGEST REF DES. NUMBERS
TRST
TMS
PWM2_1.8V = 1.875V (Redcap Core,ADDR/Data Bus, Flash, SRAM.
V3_2.775V = 2.775V (from GCAP3 V3)
VSIM1 = 3V for the SIM andQVCCH
C328
R325
U306
TP321
R310
E302
JTAG
CTS
RTS
RX
TX
SCKA
SC2A
STDA
SRDA
4-Wire RS232
ESSI
BUSY_OUT
BUSY_IN (IC2)
RX
TX
SCKA
SC2A
STDA
SRDA
SB9600
ESSI
DSP_DE
CTS
RTS
RX
TX
ROW7
ROW6
INT6
INT7
CTS
RTS
RX
TX
RI
DCD
DSR
DTR
8-Wire RS232
MCU_DE
RESET_IN
TDI
TDO
TCK
0
C314
0.1uF
C315
0.1uF
C312
10uF
V3_2.775V
PWM1_1.8V
E300
E301
1.0uF
C309
33pF
C308
C311
RS232_CTS
RS232_DSR
RS232_DTR
1.0uF
16
17
RS232_TX
RS232_RX
RS232_RTS
11
12
13
14
15
9
10
C318
0.1uF
15
C313
0.1uF
9
10
11
12
13
14
7
8
RS232_RI
MUX_CTRL
8
2
3
4
5
6
4
5
6
7
1
1
2
3
R319
0
0
R318
IO9
A6
NC1
E3
NC2
G2
NC3
H1
NC4
H6
NC5
D6
VCC1
E1
VCC2
IO15
C6
IO2
D5
IO3
E5
IO4
F5
IO5
F6
IO6
G6
IO7
B1
IO8
C1
GND2
B6
IO0
C5
IO1
C2
IO10
D2
IO11
E2
IO12
F2
IO13
F1
IO14
G1
A8
H3
A9
B2
EN_BHE
A1
EN_BLE
B5
EN_CE
A2
EN_OE
G5
EN_WE
D1
GND1
E6
A16
D3
A17
A5
A2
B3
A3
B4
A4
C3
A5
C4
A6
D4
A7
H2
A0
A4
A1
H4
A10
H5
A11
G3
A12
G4
A13
F3
A14
F4
A15
E4
19
CY62147V
U302
A3
0
R316
3
GND
2
IN_A
1
NC
4
OUT_Y_
5
VCC
TCXO_WARP
U305
MC74HC1G04
0.1uF
C307
6
1
R315
6.8K
33pF
M8
QVCCH3
K3
QVCCH4
C310
L7
QGND3
L16
QGND4
F8
QVCC1
L4
QVCC2
L13
QVCC3
M7
QVCC4
F9
QVCCH1
QVCCH2
J11
G9
NC4
G10
NC5
H7
NC6
H8
NC7
H9
NC8
H10
NC9
F10
QGND1
L1
QGND2
NC14
K7
NC15
K8
NC16
K9
NC17
K10
NC18
L6
NC19
L11
G7
NC2
G8
NC3
L9
MGND
L8
MVDD
F6
NC0
F11
NC1
J7
NC10
J8
NC11
J9
NC12
J10
NC13
HGND1
A7
A11
HGND2
B11
HVDD1
HVDD2
C8
E14
KGND
E16
KVDD
LGND
C1
LVDD
B1
L3
FGND
M4
FVDD
H15
GGND1
K16
GGND2
GGND3
T15
H16
GVDD1
M12
GVDD2
GVDD3
T16
P11
BGND
R11
BVDD
N4
CGND
N1
CVDD
T5
DGND
R5
DVDD
C16
EGND
B15
EVDD
U301-2
PWR_GND_NC
G2
AGND1
K5
AGND2
G1
AVDD1
J5
AVDD2
C317
.01uF
.01uF
C320
.01uF
C322
0.1uF
C323
C316
0.1uF
RS232_DCD
0.1uF
C301
18
C300
.01uF
SH300
SHIELD
SH301
SHIELD
INA
1
INB
4
OUTY
5
VCC
VREF1_2.775V
2
TC7S08FU
U307
3
GND
2
GND
2
INA
1
INB
4
OUTY
5
VCC
3
4
TC7S08FU
U304
3
.01uF
C327C324
0.1uF0.1uF
C326C325
.01uF
0.1uF
C319
C321
V3_2.775V_FLTR
V3_2.775V_FLTR
V3_2.775V_FLTRPWM1_1.8V_FLTR
0.1uF
RS232_DSR
DSP_3
V3_2.775V_FLTR
MEM_CNTL(6:1)
DSP_5
DSP_4
DSP_1
DSP_2
RS232_RX
RS232_CTS
MUX_CTRL
RS232_DCD
RS232_DTR
RS232_RI
RS232_TX
RS232_RTS
HST_Addr(0:21)
HST_DATA(0:15)
Controller Memory Schematic Diagram (Redcap 2) sheet 2 of 2
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