Table 22. Pedestal Height from Board Surface (Continued)
Designation
Pedestal Corresponding
Component Pedestal Height from Board Surface
2
D CPLD 2.2 mm (0.087 in.)
E DDR Memory 2.4 mm (0.094 in.)
F ENET 1210 2.2 mm (0.087 in.)
G USB PHY 2.2 mm (0.087 in.)
H CPU 2.5 mm (0.098 in.)
I NAND Flash 2.6 mm (0.102 in.)
J NI ASIC 2 2.4 mm (0.094 in.)
Note Pedestals of the same dimensions are allowed to violate the primary side
maximum component height keepaway restrictions.
Note Gap-filling thermal interface materials between the components and
pedestals confined to within the indicated region are allowed to violate the primary
side maximum component height keepaway restrictions.
Note Pedestals of the same dimensions are allowed to have 0.5 mm (0.02 in.)
rounds and 2° draft angles.
Additional Resources for Managing Thermal Conditions
Visit ni.com/r/sbriocooling for the following additional information to help you manage
thermal conditions:
• Examples regarding the effect of the design factors discussed in this chapter
• Case study examples to help you estimate the achievable external ambient temperature
for a representative system
2
Using a 1.5 mm (0.06 in.) thick thermal gap-filler.
CompactRIO Single-Board Controller with NI-DAQmx Hardware Installation Manual | © National Instruments | 57
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