National Instruments PCI-6251 User Manual

© National Instruments | B-39
M Series User Manual
Figure B-50 and Table B-34 show the output delays.
Figure B-50. Output Delays
Gating Modes
Gating mode refers to how the counter/timer uses the Gate input. Some timing operations depend
on the gating mode. Depending on the application, the counter/timers either level gating mode
or edge gating mode.
In NI-DAQmx, the counter/timers use level gating mode for the following measurements:
• Edge counting
• Pulse width measurements
• Two-signal edge separation measurements
All other measurements use edge gating mode.
Table B-34. Output Delays Timing
Time Line Min (ns) Max (ns)
t
10
— 1.0 4.0
t
11
PFI 7.5 28.2
RTSI 6.5 18.0
t
12
PFI 8.5 32.2
RTSI 7.5 22.0
t
13
PFI 7.5 28.7
RTSI 6.5 18.0
t
10
t
11
t
12
t
13
Selected Source
PFI, RTSI
(Counter
n Gate)
Selected Gate
PFI, RTSI
(Counter
n Source)
PFI, RTSI
(Counter
n Internal Out)
Out_o

National Instruments PCI-6251 Specifications

General

Brand	National Instruments
Model	PCI-6251
Category	I/O Systems
Language	English