7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
6
5
4
3
2
1
A1,SCDIN
RD,R/W,EMOE,GPIO11
WR,DS,EMWR,GPIO10
AUDATA3,XMT958
DGND1
VD1
MCLK
SCLK
LRCLK
AUDATA0
AUDATA1
AUDATA2
DC
DD
RESET
AGND
VA
FILT1
FILT2
CLKSEL
CLKIN
CMPREQ,LRCLKN2
CS
SCDIO,SCDOUT,PSEL,GPIO9
INTREQ,ABOOT
EXTMEM,GPIO8
SDATAN1
VD3
DGND3
SCLKN1,STCCLK2
LRCLKN1
CMPDAT,SDATAN2,RCV958
CMPCLK,SCLKN2
A0,SCCLK
DATA7,EMAD7,GPIO7
DATA6,EMAD6,GPIO6
DATA5,EMAD5,GPIO5
DATA4,EMAD4,GPIO4
VD2
DGND2
DATA3,EMAD3,GPIO3
DATA2,EMAD2,GPIO2
DATA1,EMAD1,GPIO1
DATA0,EMAD0,GPIO0
COMPRESSED
DATA INPUT
INTERFACE
DIGITAL
AUDIO
INPUT
INTERFACE
PLL
CLOCK MANAGER
FRAMER
SHIFTER
INPUT
BUFFER
CONTROLLER
RAM INPUT
BUFFER
PARALLEL or SERIAL HOST INTERFACE
24-BIT
DSP PROCESSING
RAM
PROGRAM
MEMORY
RAM
DATA
MEMORY
ROM
PROGRAM
MEMORY
ROM
DATA
MEMORY
STC
RAM
OUTPUT
BUFFER
OUTPUT
FORMATTER
RESET
DATA7:0,
EMAD7:0,
GPIO7:0
CS
RD,
R/W,
EMOE,
GPIO11
WR,
DS,
EMWR,
GPIO10
SCDIO,
SCDOUT,
PSEL,
GPIO9
A0,
SCCLK
A1,
SCDIN
ABOOT,
INTREQ
EXTMEM,
GPIO8
DD
DC
MCLK
SCLK
LRCLK
AUDATA<2.0>
XMT958/AUDATA3
FLT2 FLT1 VA AGND DGND(3:1) VD(3:1)
CMPDAT,
SDATAN2
CMPCLK,
SCLKN2
CMPREQ,
LRCLKN2
SCLKN1,
STCCLK2
LRCLKN1
SDATAN1
CLKIN
CLKSEL
No. Symbol
1 VD1 Digital positive supply
2 DGMD1 Digital supply ground
3 AUDATA3,XMT958 SPDIF transmitter output. Digital audio output.
6 A1,SCDIN Host address bit one or SPI serial control data input.
7 A0,SCCLK Host parallel address bit zero or serial control port clock.
8 DATA7
9 DATA6
10 DATA5
11 DATA4
12 VD2 Digital positive supply
13 DGND2 Digital supply ground
14 DATA3
15 DATA2
16 DATA1
17 DATA0
18 CS Host parallel chip select, host serial SPI chip select pin.
Serial control port data input and output, parallel port type
select pin.
20 INREQ,ABOOT Control port interrupt request, automatic boot enable
21 EXTMEM, External memory chip select or general purpose input & output number pin
22 SDATAN1 PCM audio data input number one
23 VD3 Digital positive supply
24 DGND3 Digital supply ground
25 SCLK1,STCLK2 PCM audio data input bit clock
26 LRCLKN1 PCM audio input sample rate clock
CMPDAT,ECV958
SDATAN2
CMPCLK,
SCLKN2
CMPREQ
LRCLKN2
30 CLKIN Master clock input pin
31 CLKSEL DSP clock select pin
32 FILT2 Connect to an external filter for phase-locked loop.
33 FILT1 Connect to an external filter for phase-locked loop.
34 VA Analog positive supply.
35 AGND Analog supply ground/
36 RESET Master reset input
37 DD
38 DC
39 AUDATA2 Digital audio output 2.
40 AUDATA1 Digital audio output 1.
41 AUDATA0 Digital audio output 0.
42 LRCLK Audio output sample rate clock
43 SCLK audio output bit clock
44 MCLK Audio master clock
19
4 WR,DS,EMWR,GPIO10
Host write strobe or host data strobe or external memory write enable or general
purpose input & output number 10.
5 RD,R/W,EMOE,GPIO11
Host parallel output enable or host parallel R/W or external memory output
enable or general purpose input & output number 11.
n para
e
os
mo
e
ese p
ns prov
e a
-
rec
ona
a
a
us.
a ser
a
os
mode is selected, these pins can provide a multiplexed address and data bus for
connecting an 8-bit external memory. Otherwise, in serial data host mode, these
pins can act as general-purpose input or output pins that can be individually
27
28
29
PCM audio data input number two.
PCM audio input bit clock
PCM audio input sample rate clock
These pins are reserved and should be pulled up with an external 4.7k resistors.
SCDIO,SCDOUT,PSEL
,GPIO8
n para
e
os
mo
e
ese p
ns prov
e a
-
rec
ona
a
a
us.
a ser
a
os
mode is selected, these pins can provide a multiplexed address and data bus for
connecting an 8-bit external memory. Otherwise, in serial data host mode, these
pins can act as general-purpose input or output pins that can be individually
Description
HT-R510
CS493264(DSP IC)
IC BLOCK DIAGRAMS AND DESCRIPTIONS
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