Onkyo HT-R960 - Page 58

TX-SR606
IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS-27
Q8001 : FLI30502 (LCD TV Controller with Worldwide Standard Sound Processor
and HDMI Receiver)-9/12
TERMINAL DESCRIPTION
TTL Display interface
I/O
O
O
---
---
O
O
O
O
O
O
O
O
O
O
G
DP
O
O
O
O
O
O
O
O
O
O
G
DP
O
O
O
O
O
O
O
O
Description
8-Bit Panels
Panel Bias Control (backlight enable, tri-state output, 5 V tolerant).
Panel Power Control (tri-state output, 5 V tolerant).
Digital Power for LVDS Block. Connect to digital 3.3V supply.
Ground for TTLL outputs.
Red channel bit 0 (Even).
Red channel bit 1 (Even).
Red channel bit 2 (Even).
Red channel bit 3 (Even).
Red channel bit 4 (Even).
Red channel bit 5 (Even).
Red channel bit 6 (Even).
Red channel bit 7 (Even).
Green channel bit 0 (Even).
Green channel bit 1 (Even).
Ground for TTL outputs.
Digital Power for TTL outputs. Connect to digital 3.3 V supply.
Green channel bit 2 (Even).
Green channel bit 3 (Even).
Green channel bit 4 (Even).
Green channel bit 5 (Even).
Green channel bit 6 (Even).
Green channel bit 7 (Even).
Blue channel bit 0 (Even).
Blue channel bit 1 (Even).
Blue channel bit 2 (Even).
Blue channel bit 3 (Even).
Ground for TTL outputs.
Digital Power for TLL outputs. Connect to digital 3.3 V supply.
Blue channel bit 4 (Even).
Blue channel bit 5 (Even).
Blue channel bit 6 (Even).
Blue channel bit 7 (Even).
Display Data Enable.
Display Horizontal Sync.
Display vertical Sync.
Display Pixel Clock.
Pin Name
PBIAS
PPWR
AVDD_LV_33
AVSS_LV
R0
R1
R2
R3
R4
R5
R6
R7
G0
G1
AVSS_OUT_LV
AVDD_OUT_LV_33
G2
G3
G4
G5
G6
G7
B0
B1
B2
B3
AVSS_OUT_LV
AVDD_OUT_LV_33
PD20/B4
PD21/B5
PD22/B6
PD23/B7
DEN
DHS
DVS
DCLK
Pin #
71
72
74
73
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
67
68
69
70
6-Bit Panels
Not used.
Not used.
Red channel bit 0 (Even).
Red channel bit 1 (Even).
Red channel bit 2 (Even).
Red channel bit 3 (Even).
Red channel bit 4 (Even).
Red channel bit 5 (Even).
Not used.
Not used.
Green channel bit 0 (Even).
Green channel bit 1 (Even).
Green channel bit 2 (Even).
Green channel bit 3 (Even).
Green channel bit 4 (Even).
Green channel bit 5 (Even).
Not used.
Not used.
Blue channel bit 0 (Even).
Blue channel bit 1 (Even).
Blue channel bit 2 (Even).
Blue channel bit 3 (Even).
Blue channel bit 4 (Even).
Blue channel bit 5 (Even).
Palallel / Serial ROM interface
I/O
O
O
O
Description
Address Signal A20 for 2M x 8 PROM. This pin also acts as GPIO10.
Address Signal A19 for 1M x 8 PROM / 2M x 8 PROM. This pin also acts as GPIO9.
Address Signal A18 for 512K x 8 PROM / SRAM. This pin also acts as GPIO49.
Pin Name
A20
A19
A18
Pin #
42
41
105