Onkyo TX-SA805 - Page 150

IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -76
Q103 : F2628E-01 (XM Digital Transceiver)
TERMINAL DESCRIPTION(1/2)
TX-SR805/SA805
Pin No. Pin Name Direction Function in Slave Mode Function in Master Mode Notes
1 LSDP
S=In
M=Out
Low Speed Data Port Input Low Speed Data Port Output
Out= 4mA, SLC
In=LVTTL S/T
3 SC_TX_OUT
S=Out
M=Out
System Controller Bus (CBM)
Transmit Data Out
System Controller Bus (CBM)
Transmit Data Out
4mA, SLC
5 SC_RX_IN
S=In
M=In
System Controller Bus (CBM)
Receive Data In
System Controller Bus (CBM)
Receive Data In
LVTTL S/T
6 RFU (I2C-SCL)
S=In
M=In
Reserved for Future Use (pull
down with a 100k resistor to
Ground)
Reserved for Future Use (pull
down with a 100k resistor to
Ground)
LVTTL S/T
7 RFU (I2C-SDA)
S=In
M=In
Reserved for Future Use (pull
down with a 100k resistor to
Ground)
Reserved for Future Use (pull
down with a 100k resistor to
Ground)
LVTTL S/T
9 ANT_REV
S=n/u
M=Out
Not used in Slave mode, leave
unconnected
Indication of incompatible
antenna (
refer to section
4.3.2 for usage)
4mA, SLC
11 RESET#
S=In
M=In
Asynchronous Reset In,
(Active Low)
Asynchronous Reset In,
(Active Low)
LVTTL S/T
12 SLAVE_SEL
S=In
M=In
Master/Slave Mode Select In
(High = Slave Mode)
Master/Slave Mode Select In
(Low = Master Mode)
LVTTL S/T
13 I2S_RATE
S=Out
M=Out
Output driven high, leave
unconnected
Indicator of incoming I2S data
rate (see section 4.4.2)
4mA, SLC
14 LINKACTIVE
S=Out
M=Out
Link Active indicator (High =
DT bus link is active and data
is flowing)
Link Active indicator (High =
DT bus link is active and data
is flowing)
4mA, SLC
15 COMM_TX_EN
S=Out
M=Out
DT Comm Bus External
Transceiver Direction
Control Output (0=Tx, 1=Rx)
DT Comm Bus External
Transceiver Direction
Control Output (0=Tx, 1=Rx)
4mA, SLC
18 COMM_RX_P
S=In
M=In
DT Differential Comm Bus
Internal Receiver Positive In
DT Differential Comm Bus
Internal Receiver Positive In
LVDS in+
19 COMM_RX_M
S=In
M=In
DT Differential Comm Bus
Internal Receiver Negative In
DT Differential Comm Bus
Internal Receiver Negative In
LVDS in–
22 COMM_TX_M
S=Out
M=Out
DT Differential Comm Bus
Internal Transmitter Negative
Out
DT Differential Comm Bus
Internal Transmitter Negative
Out
LVDS out–
23 COMM_TX_P
S=Out
M=Out
DT Differential Comm Bus
Internal Transmitter Positive
Out
DT Differential Comm Bus
Internal Transmitter Positive
Out
LVDS out+
26 OSC_OUT
S=Out
M=Out
Crystal Driver Output Crystal Driver Output
28 OSC_IN
S=In
M=In
Crystal/ Ext. Clock Input Crystal/ Ext. Clock Input
29
SC_RATE
(Rev 4A only, pull
down for rev 3B)
S=Out
M=In
SC interface baud rate Output
(High = DT4_MODE is high
and the Master DTIC is
operating at 115.2K baud)
SC interface baud rate select
Input
(High = 115.2K baud, Low =
9600 baud)
Out= 4mA, SLC
In=LVTTL S/T
30 TEST
S=In
M=In
Factory Test Mode Select
(1=Test, 0= Normal Oper.)
Factory Test Mode Select
(1=Test, 0= Normal Oper.)
LVTTL S/T