Onkyo TX-SR403 - Page 69

TX-SR403/8340
IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS-11
Q201: CS494003CQZ (Multi-Standard Audio Decoder)-11/11
UHS0, GPIO18 --- Mode Select Bit 0, General Purpose I/O
DSPC control port mode select bit 0. This pin is sampled at the rising edge of RESET and is
one of three pins used to select the control port mode. This pin can act as a general-purpose
input or output that can be individually configured and controlled by DSPC.
BIDIRECTIONAL - Default: INPUT
UHS1, GPIO19 --- Mode Select Bit 1, General Purpose I/O
DSPC control port mode select bit 1. This pin is sampled at the rising edge of RESET and is
one of three pins used to select the control port mode. This pin can act as a general-purpose
input or output that can be individually configured and controlled by DSPC.
BIDIRECTIONAL - Default: INPUT
GPIO20 --- General Purpose I/O
This pin can act as a general-purpose input or output that can be individually configured and
controlled by DSPC. This pin has an internal pull-up.
BIDIRECTIONAL - Default: INPUT
GPIO21 --- General Purpose I/O
This pin can act as a general-purpose input or output that can be individually configured and
controlled by DSPC. This pin has an internal pull-up.
BIDIRECTIONAL - Default: INPUT
VDD [7:1] --- 2.5V Supply Voltage
VSS --- 2.5V Ground
2.5V supply voltage.
2.5V ground.
NC[5:1] --- No Connect
Recommended tie to ground.
VDDSD [4:1] --- 3.3V SDRAM / SRAM / EPROM Interface Supply
3.3V SDRAM / SRAM / EPROM supply.
VSSSD --- 3.3V SDRAM / SRAM / EPROM interface Ground
3.3V ground.