Owon XDS3202E - Common Display and Waveform Issues

11.Technical Specifications
142
Performance Characteristics
Instruction
XDS3102AP
XDS3112
XDS3202(A)
XDS3302
1 MΩ±2%, in parallel with
15 pF±5 pF；50Ω ± 2%
Probe attenuation factor
0.001X - 1000X, step by 1 – 2 - 5
Max input voltage
1MΩ：≤300 Vrms;
50Ω：≤5 Vrms (For certain models)
Bandwidth limit
20 MHz, full bandwidth
Channel to channel
isolation
50Hz: 100 : 1
10MHz: 40 : 1
Time delay between
channel (typical)
150ps
Horizontal
System
Sampling rate range
XDS3062A
XDS3102A
Dual CH
0.05 S/s～500
MS/s
Single CH
8 bits
mode
0.05 S/s～
1 GS/s
12 bits
mode
0.05 S/s～
500 MS/s
XDS3102
Dual CH
0.05 S/s～500
MS/s
Single CH
0.05 S/s～1 GS/s
XDS3202E
Dual CH
0.05 S/s～500
MS/s
Single CH
0.05 S/s～1 GS/s
XDS3102AP
XDS3202A
Dual CH
8 bits
mode
0.05 S/s～
1 GS/s
12 bits
mode
0.05 S/s～
500 MS/s
14 bits
mode
0.05 S/s～
100 MS/s
Single CH
8 bits
mode
0.05 S/s～
1 GS/s
12 bits
mode
0.05 S/s～
500 MS/s
14 bits
mode
0.05 S/s～
100 MS/s
XDS3112
XDS3202
Dual CH
0.05 S/s～1 GS/s
Single CH
0.05 S/s～2 GS/s
XDS3302
Dual CH
0.05 S/s～1.25
GS/s