Panasonic CQ-C8401W

Pin
No.
Port Descriptions I/O (V)
59 DATA M
C
AUDIO serial data output O 1.6
60 SO Serial data output O 1.1
61 - - - -
62 - - - -
63 /NMI - - 3.1
64 /INT0 - - 3.1
65 /INT1 - - 3.1
66 BLKCK Subcode block clock pulse input I 0
67 /INT3 - - 3.1
68 CV DD4 CORE CPU system (1.6V) power
supply
- 1.6
69 SW1 Mechanics deck SW1 input I 0
70 CVSS7 GND - 0
71 MCLK Clock output (To Servo DSP) O 3.1
72 DVSS4 GND - 0
73 MLD Command load signal output (To
Servo DSP)
I 3.1
74 MDATA Command data output (To Servo
DSP)
O 3.1
75 DVDD4 I/O system (3.3V) power supply - 3.1
76 DVSS5 GND - 0
77 CLK MD1 Clock mode setting (L fixation) I 0
78 CLK MD2 Clock mode setting (H fixation) I 3.1
79 CLK MD3 Clock mode setting (L fixation) I 0
80 - - - -
81 SW2 Mechanics deck SW2 input I 0.2
82 - - - -
83 EMU0 - - 3.1
84 EMU/OF
F
- - 3.1
85 TDO - - 0
86 TDI - - 3.1
87 /TRST - - 0
88 TCK - - 3.1
89 TMS - - 3.1
90 CVSS8 GND - 0
91 CVDD5 CORE CPU system (1.6V) power
supply
- 1.6
92 HPIENA GND I 0
93 DVSS6 GND - 0
94 - - - -
95 CLKENA Oscillation output Cainabl signal O 0
96 X1 Crystal Connection O 0.7
97 X2/CLKIN Crystal Connection I 1.0
98 RS Reset signal input I 3.1
99 D0 Data base of FLASH ROM I/O 0
100 D1 I/O 0
101 D2 I/O 0
102 D3 I/O 0
103 D4 I/O 0
104 D5 I/O 0
105 A16 Address bus of FLASH ROM O 3.1
106 DVSS7 GND - 0
107 A17 Address bus of FLASH ROM O 3.1
108 A18 Address bus of FLASH ROM O 0
109 A19 TP419 O 0
110 A20 TP416 O 0
111 CVSS9 GND - 0
112 DVDD5 I/O system (3.3V) power supply - 3.1
113 D6 Data bus of FLASH ROM I/O 0
114 D7 I/O 0
115 D8 I/O 0
116 D9 I/O 0
117 D10 I/O 0
118 D11 Data bus of FLASH ROM I/O 0
119 D12 I/O 0
Pin
No.
Port Descriptions I/O (V)
120 STAT Status signal input I 3.0
121 D13 Data path of FLASH ROM I/O 3.1
122 D14 I/O 0
123 D15 I/O 0
124 - - - -
125 CVDD6 CORE CPU system (1.6V) power
supply
- 1.6
126 CVSS10 GND - 0
127 - - - -
128 DVSS8 I/O system (3.3V) power supply - 0
129 - - - -
130 DVDD6 I/O system (3.3V) power supply - 3.1
131 A0 Address bus of FLASH ROM O 3.1
132 A1 O 0
133 A2 O 0
134 A3 O 0
135 /RST Reset signal output(To Servo DSP) O 3.1
136 A4 Address bus of FLASH ROM O 0
137 A5 O 3.1
138 A6 O 3.1
139 A7 O 0
140 A8 O 3.1
141 A9 O 3.1
142 CVDD7 CORE CPU system (1.6V) power
supply
- 1.6
143 A12 TP406 - 0
144 DVSS9 GND - 0
16
CQ-C8401W / CQ-C7401W