High−level Instructions
3 − 439
Program example
Example: Software reset of channel 0 of high−speed counter.
X3
DF F0 MV, H4, DT9052
F0 MV, H0, DT9052
Using the FPΣ
High−speed counter and Pulse output controls flag area
The area DT90052 for writing channels and control codes is allocated as shown below.
The control code written by the F0 (MV) instruction is stored in the control code monitor area while it is written
in the special register DT90052. (Refer to the table below.)
The written data is the data for lower 8 bits only.
High−speed counter and Pulse output controls flag area of FPΣ
15 12 11 8 7 4 3 0
Clear high−speed counter instruction
0: Continue
1: Clear
Reset input setting (See note.)
0: Enable
1: Disable
Count
0: Permit
1: Prohibit
Software reset
0: No
1: Yes
DT90052:
Channel specification
H0 to H3: CH0 to CH3
Note:
At the reset input setting, you set whether the reset input (X2 or X5), which was assigned by the
system register high−speed counter setting, will be enabled or disabled.
FP0/FPΣ/FP−X/FP0R
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