Panasonic TX-P42S20L - Page 60

13.15. A-Board (10/19) Schematic Diagram
A
A-BO AR D (10/19)
VIDEO AU D IO I/O
E_A V1_Vi A A V 2 Vi
A A V 2 LRi
J0JCC0000287 220
1 R3144 150
-- 1
E_ A V 2_Vi/Y i A_A V2 S _ Y (PD P _A V3_n o th in g model)
J0JCC0000287
E_ AV1 RGB
E_AV1_RED(15PIN)/A_AV2
'1_GREEN(11PyA_A'
(A _ A V 2_ Y P bP r)
E _ A V 2 RG B /C
'2_RED/C(15PIN)_TE
'2_GREEN(11PyA_A'
E_A V 1_Vo A _M on ito r O U T
E_AV1_VOUT(19PyA_VOIUT T
V ID EO O UT
A U D IO IN
A U D IO O U T
E_AV1
,V1_Q-LINK(10P)_TEI
E_A V2
'2_Q-LINK(10P)_TI
. B0ACCJ000048
DZ2J140M0L \
E_ AV1 F B /S L O W -S W
R3199 R3201
150 U U 150
E_A V 2 F B /S L OW -S W
R3200 R3202
150 150
Shee t
Standby-M PU
—O STMCECAVL1A SG-QLINK1
—О STMCECAVL1B SG-QLINK2
E_A V 2 _ V o
A _ A V1 _ Y PbP r
B R3
"T
У
E A V3 L/R A S ID E L/R
82 83 84 85 86 87 88 89 90
V ID E O IN
DZ2J140M0L
10u 10V
TO 11/19
TO
9/19
TO 11/19
TO
9/19
E _ Y Pb P r
TO
9/19
55