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Philips 32PFL5615D/7 - Page 58

Philips 32PFL5615D/7
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Circuit Descriptions
EN 58 Q552.1L LA7.
2010-Dec-29
back to
div. table
Notes to figure 7-21 TCON block diagram:
LVDS receiver: converts the data stream back into RGB
data and SYNC signals (Vsync, Hsync, Data Enable - DE)
ODC: Over Drive Circuit - to improve LC response
Data Path Block: the video RGB data input to data path
block is delayed to align the column driver start pulse with
the column driver data
Timing Control Function: generates control signals to
column drivers and row drivers (Source Enable - SOE,
Gate Enable - GOE, Gate Start Pulse - GSP).
For an overview of the TCON DC/DC converters, refer to figure
7-22
TCON DC/DC converters.
Figure 7-22 TCON DC/DC converters
7.9.1 TCON Programming
For LGD - TCONs, the EEPROM can be programmed via
ComPair (via I
2
C communication).
For Sharp - TCONs, the data can be flashed with a “SPI
Programmer” (via SPI communication). This device has to be
ordered separately via Philips.
7.9.2 TCON Alignment
The purpose of TCON alignment is to obtain equal voltages for
both positive and negative LC polarity. This is to avoid “flicker”
and “image sticking”. For alignment, see 6.3.3
TCON/VCOM
alignment.
18770_240_100128.eps
100128
DC/DC
Controller
+12V
LGD
SHP
Where Used
VGH
+28 V
+3 5V
To Gate D rivers (Gate
Hig h Voltage)
VGL
-6 V
-6 V
To Gate D rivers (Gate
Low Voltag e)
Vcc
+3 V 3
+3 V 3
Timing C ontroller IC
S upply Voltag e
Vcc
+1V8
+1V2
Timing C ontroller IC
S upply Voltag e
Vref
+16V
+15V2
Gamma Reference
Voltage
Vdd
+16V
+15V6
S ource Driver S upply
Voltage

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