Philips DCC170/00 - Page 65

262144
BIT
(s12
X sl2)
MEMORY
CELL ARRAY
SENSE
SWITCH
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Ar
Ar Ar
A.
4,.
o
Q502
pPD43256BGU-B1
2
S.RAM
A,
Af
A1
A.
A,
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Arr
A,r
4,.
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Q551 SAA2OOS
SFCs
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t
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TESTO
TESTI
STEREO
SUE.BANO
FILTER PFOCESSOH
PASC
co0Ec
PROCESSOR
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sws
EASEBANO
SERIAL
INTEAFACE
E
PEAK
OETECTOR
scL
FILTEREO
DATA
INTERFACE
L
SDAI
SOA2
t
o
lt
*l*
IECOP
lEC
958
OUTPUT
o
á
lt
PIN NO. NAME t/o
FUNCTION
1
A14 Add ress
nput
2
A12
Add ress nput
3
A7 Address
input
4
A6 Add ress
nput
5
A5 Ad
d
ress n
put
6
A4 Add ress nput
7
A3 Ad
d
ress n
put
8
A2 Address
input
I
A1 I Add ress
n
put
10 AO
Add
ress n
put
11 DO t/o Data input output
12
D1 t/o Data
input
output
13 D2
t/o
Data input output
14
Vss
GND
15
D3 t/o Data input
output
16
D4 t/o Data
input
output
17
D5 t/o Data input
output
18 D6 t/o Data input
output
19 D7 t/o Data
input
output
20
CS Chip select
21 410 Address
input
22 OEN Output enable
inout
23 All Add ress
in
put
24 A9 Address
input
25 A8 Address input
'26
413 Add ress in
put
27
WEN Write
enable
input
2g Vcc Power
supply
Table 1 Revised
Device Pi""
Piu
Nottre T1rye Fun
I
2
3
FDAI
rDCL
FDV'S
I
o
o
filtcred
serial daa
inpu
filtered
data bit clock
filtered
data
word
select
4
5
6
Ql.Rt
2
x220ur
X22IN
o
o
I
22.5792
TVÍEtr
bulfered
c.
22.5792 MEz XTAL
oscj
22.5792
MEz
XTAL osci
7
I
\rDD2
VSS2
positive
supply
(clock
os
supply
ground
(clock
osr
I
10
11
x240u"t
X24IN
CIJC24
o
I
o
24.576
MFÍz
XTAI oscil
24.576
ÏlíTr-
XTAL oscil
24.576 MEz buffered clo
L2
13
SfAIVDBY
RESET
I
I
device
inactive
device
resct
14
15
16
I,3DATA
I3CI.K
IsMODE
vo
I
I
I,3 interface
serial
data
I3 interface bitclock
I3 interface mode contn
L7
18
LTCNTO
LTCNTl
I
I
LT compatible
intcrface
LT
compatible
interface
19
20
TESTO
TESTl
I
I
testmode select
testmode
select
2L
22
23
24
25
26
URDA
SBDIR
SBDA
SBCt
SBWS
SBEF
I
I
vo
vo
vo
I
unreliable data
fnrm dri
subband data
directiou
subband
serial
data
sub-baad
bit
clock
sub-band
word
select
sub-band
error
flag
from
27
28
VSSl
\TDDl
supply
ground
(logic)
positive
supply
(Iogic)
29
IECOP
o
IEC958 digital
audio
ou
30
31
32
DEEMDAC
ATTDAC
MI,IIEDAC
o
o
o
DAC control
or
general
p
DAC coutrol
or
geoeral
p
DAC
control
or
general
p
33
34
35
36
SDA2
SDAl
SCL
s\ils
o
vo
vo
vo
baseband serial
data
ouQ
basebaad serial daa
to/fi
baseband bitclock
baseband
word
select
3?
38
x256
rs256
I
o
master
audio clock
input
naster audio clock
at
256
39
40
VDDg
vsss
positive
supply
(FS256
pi
supply
grouad
(FS256
pit
41
u2
43
u
FDIR
SYNCDAI
FSYNC
FDAO
o
o
o
o
PASC mode encode/decod
rettings
syncbronisation
subband
0 sanple s]tncb
filtcred serial data
outpu
PCS
79 306
-63-