Philips Semiconductors
PDIUSBD12
USB interface device with parallel bus
Product data Rev. 08 — 20 December 2001 2 of 35
9397 750 09238
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.
■ Double buffering scheme for main endpoint increases throughput and eases
real-time data transfer
■ Data transfer rates: 1 Mbytes/s achievable in Bulk mode, 1 Mbits/s achievable in
Isochronous mode
■ Bus-powered capability with very good EMI performance
■ Controllable LazyClock output during suspend
■ Software controllable connection to the USB bus (SoftConnect™)
■ Good USB connection indicator that blinks with traffic (GoodLink™)
■ Programmable clock frequency output
■ Complies with the ACPI, OnNOW and USB power management requirements
■ Internal Power-on reset and low-voltage reset circuit
■ Available in SO28 and TSSOP28 pin packages
■ Full industrial grade operation from −40 to +85 °C
■ Higher than 8 kV in-circuit ESD protection lowers cost of extra components
■ Full-scan design with high fault coverage (>99%) ensures high quality
■ Operation with dual voltages:
3.3 ±0.3 V or extended 5 V supply range of 4.0 to 5.5 V
■ Multiple interrupt modes to facilitate both bulk and isochronous transfers.
3. Pinning information
3.1 Pinning
Fig 1. Pin configuration.
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