Philips PDIUSBD12 - Pin Description

Philips Semiconductors
PDIUSBD12
USB interface device with parallel bus
Product data Rev. 08 — 20 December 2001 3 of 35
9397 750 09238
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.
3.2 Pin description
Table 1: Pin description
Symbol Pin Type
[1]
Description
DATA <0> 1 IO2 Bit 0 of bidirectional data. Slew-rate controlled.
DATA <1> 2 IO2 Bit 1 of bidirectional data. Slew-rate controlled.
DATA <2> 3 IO2 Bit 2 of bidirectional data. Slew-rate controlled.
DATA <3> 4 IO2 Bit 3 of bidirectional data. Slew-rate controlled.
GND 5 P Ground.
DATA <4> 6 IO2 Bit 4 of bidirectional data. Slew-rate controlled.
DATA <5> 7 IO2 Bit 5 of bidirectional data. Slew-rate controlled.
DATA <6> 8 IO2 Bit 6 of bidirectional data. Slew-rate controlled.
DATA <7> 9 IO2 Bit 7 of bidirectional data. Slew-rate controlled.
ALE 10 I Address Latch Enable. The falling edge is used to close the
latch of the address information in a multiplexed address/ data
bus. Permanently tied LOW for separate address/ data bus
configuration.
CS_N 11 I Chip Select (Active LOW).
SUSPEND 12 I,OD4 Device is in Suspend state.
CLKOUT 13 O2 Programmable Output Clock (slew-rate controlled).
INT_N 14 OD4 Interrupt (Active LOW).
RD_N 15 I Read Strobe (Active LOW).
WR_N 16 I Write Strobe (Active LOW).
DMREQ 17 O4 DMA Request.
DMACK_N 18 I DMA Acknowledge (Active LOW).
EOT_N 19 I End of DMA Transfer (Active LOW). Double up as V
BUS
sensing.
EOT_N is only valid when asserted together with DMACK_N
and either RD_N or WR_N.
RESET_N 20 I Reset (Active LOW and asynchronous). Built-in Power-on reset
circuit present on chip, so pin can be tied HIGH to V
CC
.
GL_N 21 OD8 GoodLink LED indicator (Active LOW)
XTAL1 22 I Crystal Connection 1 (6 MHz).
XTAL2 23 O Crystal Connection 2 (6 MHz). If external clock signal, instead
of crystal, is connected to XTAL1, then XTAL2 should be
floated.
V
CC
24 P Voltage supply (4.0 − 5.5 V).
To operate the IC at 3.3 V, supply 3.3 V to both V
CC
and V
OUT3.3
pins.
D− 25 A USB D− data line.
D+ 26 A USB D+ data line.