Quectel BG95-M3 - Power Supply

LPWA Module Series
BG95 Hardware Design
BG95_Hardware_Design 33 / 80
Figure 3: Sleep Mode Application via UART
 When BG95 has URC to report, RI signal will wake up the host. Please refer to Chapter 3.14 for
details about RI behavior.
 Driving the host DTR to low level will wake up the module.
 AP_READY* will detect the sleep state of the host (can be configured to high level or low level
detection). Please refer to AT+QCFG="apready" command in document [2] for details.
“*” means under development.
3.5. Power Supply
3.5.1. Power Supply Pins
BG95 provides the following four VBAT pins for connection with an external power supply. There are two
separate voltage domains for VBAT.
 Two VBAT_RF pins for module’s RF part.
 Two VBAT_BB pins for module’s baseband part.
The following table shows the details of VBAT pins and ground pins.
NOTE