4 Rabbit 2000/3000 Microprocessor
EXX ....................................33
H. Stack Manipulation
POP IP ..................................73
POP IX ..................................73
POP IY ..................................73
POP zz .................................74
PUSH IP ................................75
PUSH IX ................................75
PUSH IY ................................75
PUSH zz ................................76
I. 16-bit Arithmetic, Logical, and Rotate
ADC HL,ss ..............................15
ADD HL,ss ..............................17
ADD IX,xx ...............................18
ADD IY,yy ...............................18
ADD SP,d ...............................18
AND HL,DE ..............................21
AND IX,DE ..............................21
AND IY,DE ..............................21
BOOL HL ................................24
BOOL IX ................................25
BOOL IY ................................25
DEC IX ..................................29
DEC IY ..................................29
DEC ss .................................30
INC IX ..................................34
INC IY ..................................34
INC ss ..................................35
MUL ....................................68
NEG ....................................69
OR HL,DE ...............................71
OR IX,DE ...............................71
OR IY,DE ...............................71
RL DE ..................................83
RR DE ..................................88
RR HL ..................................88
RR IX ...................................88
RR IY ...................................88
SBC HL,ss ..............................95
J. 8-bit Arithmetic and Logical
ADC A,(HL) .........................13
ADC A,(IX+d) .......................13
ADC A,(IY+d) .......................13
ADC A,n ................................ 14
ADC A,r ................................ 14
ADD A,(HL) ............................. 15
ADD A,(IX+d) ........................... 15
ADD A,(IY+d) ........................... 15
ADD A,n ................................ 16
ADD A,r ................................ 16
AND (HL) ............................... 20
AND (IX+d) ............................. 20
AND (IY+d) ............................. 20
AND r .................................. 22
CP (HL) ................................ 26
CP (IX+d) ............................... 26
CP (IY+d) ............................... 26
CP n ................................... 27
CP r .................................... 27
NEG ................................... 69
OR (HL) ................................ 70
OR (IX+d) ............................... 70
OR (IY+d) ............................... 70
OR n ................................... 72
OR r ................................... 72
SBC (IX+d) ............................. 93
SBC (IY+d) ............................. 93
SBC A,(HL) ............................. 93
SBC A,n ................................ 94
SBC A,r ................................ 94
SUB (HL) .............................. 104
SUB (IX+d) ............................ 104
SUB (IY+d) ............................ 104
SUB n ................................. 104
SUB r ................................. 105
XOR (HL) .............................. 106
XOR (IX+d) ............................ 106
XOR (IY+d) ............................ 106
XOR n ................................. 107
XOR r ................................. 107
K. 8-bit Bit Set, Reset, and Test
BIT b,(HL) .............................. 23
BIT b,(IX+d) ............................. 23
BIT b,(IY+d) ............................. 23
BIT b,r .................................. 24
RES b,(HL) ............................. 77
RES b,(IX+d) ............................ 77
RES b,(IY+d) ............................ 77
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