Write Direct
(WRD)
General Description
Format
(SI)
Condition Code
Interrupt
Action
Privileged
Instructions
• The eight-bit byte specified by
the
first address
(Bl/Dd
is accessed
and
transmitted to all units via
the
Static Out lines. The eight-bit I field
specifies the
Signal Out lines to be pulsed. The Static Out lines
remain
as
specified until the next Write Direct instruction.
84
o
7 8
15
16 19 20
31
• Unchanged.
• Privileged operation.
Address
error:
Addressing.
Operation code
trap
(if
Direct Control option
is
not
installed).
Notes 1. Each
trunk
has only one Signal Out line
and
is pulsed according to
the following
pattern:
I-Fiel4
Trunk(s)
Pulsed
Bit
to
= 1
Six
Bit
1 = 1
Five
Bit
2 = 1
Four
Bit
3 = 1
Three
Bit
4 = 1
Two
Bit
5 = 1
One
Bit
6 = 0
Reserved
(Must be zero)
Bit
7 = 0
Reserved
(Must be zero)
More
than
one I-Field
bit
may be
set
to 1 providing pulses
for
sending over more
than
one direct control
trunk.
This permits
sending the same byte to all processors connected
to
the
trans-
mitting
processor.
2.
A processor cannot
Write
Direct to itself. The I-Field
bit
associated
with
the
transmitting
processor
must
always be reset to zero. (This
is a programming restriction.)
3. An I field
of
all zeros causes
the
byte specified by
the
first address
to be placed on
aU
trunks
but
does not cause
an
interrupt
to occur
in
the
other connected processors. This byte can be read by a Read
Direct instruction.
118
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