Program Interrupt
Blocks 14 and 15 •
If
the
interrupt
condition is a Supervisor Call,
the
Rl
and
R2
fields of
the
Supervisor Call instruction
are
stored in
the
rightmost
eight-bits
of
the
Interrupt
Status
register
of
the
state
in which
the
instruction
is executed.
Block
16
• The
instruction
at
the
address specified in
the
P
counter
of
the
initi-
ated
state
is staticized and executed.
Program Controlled • The
Program
Control instruction
transfers
the
program
from
one
Interrupt processor
state
to another. This
instruction
is a privileged operation
and
can be executed only
if
the
state
in which
the
processor is
operating
is in
the
privileged mode
(bit
position 15 of
the
Interrupt
Status
register
=
0).
When a
Program
Control instruction is executed, the following events
occur.
(See figure 4.)
Block 1 • The address (B1/D
1
)
specified in
the
Program
Control instruction is
stored in
the
P counter of
the
terminated
state. The length of
the
last
instruction
executed
in
the
terminated
state,
the
condition code setting,
and
the
program
mask
are
stored
in
the
P counter of
the
terminated
state.
Block 2 • A check is made to see
if
the
program
test
bit
in
the
Program
Control
instruction is set.
Block 3
Block
4
Block 5
Block 6
Block
7
•
If
the
program
test
bit
is
not
set, the
Interrupt
Mask
register
for
the
state
to be initiated by the
Program
Control instruction is compared to the
Interrupt
Flag
register.
If
an
interrupt
condition
has
occurred,
the
events
described
under
automatic
interrupt
take
place (see figure
3,
block
3).
Important:
If
an
interrupt
is
outstanding
in
the
state
to be initiated by
the
Program
Control instruction,
the
number
of
the
initiated
state
specified
by
the
Program
Control instruction is stored in
the
interrupt
status
identifier field of
the
Interrupt
Status
register
of
the
initiated
state
(P
3
or
P
4
).
•
If
an
interrupt
condition is
not
outstanding
in
the
state
to be initiated
by
the
Program
Control, instruction control is
transferred
to the
state
specified
by
the
Program
Control instruction (directly
or
indirectly - See
Program
Control
instruction).
• The condition code
setting
and
the
program
mask
are
extracted
from
the
P counter of
the
initiated
state
and stored in the
appropriate
machine
registers.
• The memory protection key,
the
decimal code and
the
privileged mode
bits
are
extracted
from
the
Interrupt
Status
register
of
the
initiated
state
and
stored in
the
appropriate
machine registers.
• The instruction
at
the address specified in the P counter of the initi-
ated
state
is staticized and executed.
33
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