Multiply Word
(MR)
(M)
General Description
Format
(RR)
(RX)
Condition Code
Interrupt Action
Fixed-Point
Instructions
• The operand (multiplicand) specified
by
the
first
address
(Rd
is
multiplied
by
the
operand (multiplier) specified
by
the
second address
(R
2
or
Xd
B
2/D
2
).
The double-length p-roduct is loaded
into
the
register
specified
by
the
first address
(R
1
),
which
must
be
an
even number,
and
the
next
odd-numbered register.
I
(MR)
10
Rl
R2
0
7 8 11
12 15
I
(M)
50
Rl
X
2
B2
0
7 8 11
12 15
16
19
20
31
• Unchanged.
•
Address
error:
Addressing
(RX
format).
Specification.
Notes • 1. The first address
(R
1
)
must
always
refer
to
the
even-numbered regis-
ter
of
an
even/odd pair. The multiplicand is
taken
from
the
odd-numbered
register
of
the
pair. The original contents
of
the
even-numbered register, which is replaced
by
the
product, is ignored.
An
overflow cannot occur.
2.
Only
when
two maximum negative
numbers
are
multiplied does
the
product
exceed 62 significant bits. This
product
produces
63
signifi-
cant
bits.
3.
In
two's-complement notation,
the
sign
bit
is
propagated
right,
up
to
the
first significant
product
bit.
4.
The
sign
of
the
product
is determined algebraically. A zero
result
is always positive.
5. The least significant
digit
of
the product goes into
the
odd-numbered
register.
6.
The operand specified
by
the
second
address
(multiplier) is unaltered
except when
the
first
and
second addresses specify
the
same (even
numbered) register.
In
this
case
the
multiplier is
taken
from
the
even register,
the
multiplicand is
taken
from
the
odd
regis~r
and
the
product is placed into
the
even/odd
pair.
142
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