Block 1
Block 2
Block 3
Block
4.
Block 5
Block 6
Block 7
Block 8
Block 9
Input/Output Operation
•
If
the
privileged mode
bit
(bit
position 15
of
the
Interrupt
Status
register)
for
the
current
state
is not set to zero,
the
privileged operation
bit
is
set
in
the
Interrupt
Flag
register
and
an
interrupt
occurs
(if
permitted).
•
If
the
specified channel is a selector channel which is not available
on
the
system,
the
condition code is set to
3,
the
Halt
Device instruction is
terminated
and
program
control is
transferred
to the
next
instruction.
•
If
the
specified channel is a selector channel
that
is busy
or
if
the
speci-
fied channel is the multiplexor
that
is operating in the
burst
mode,
the
Chain Command (CC) flag in CCR-II is reset,
the
device control electronics
is told to
set
an
end condition, the condition code is
set
to
2,
the
Halt
Device
instruction is terminated,
and
program
control is
transferred
to
the
next
instruction.
Notes:
1.
Setting
an
end condition causes
the
device
to
be halted on servicing
the
next
data
transfer
(see Servicing a
Data
Transfer).
2.
The Chain Command flag
must
be reset to suppress chaining
during
termination (see Chaining
and
End
Servicing section, below).
•
If
the
specified channel is not the multiplexor channel,
the
condition
code is
set
to
0,
the
Halt
Device instruction is terminated
and
program
control is
transferred
to
the
next instruction.
•
If
the
specified channel is
the
multiplexor channel,
the
channel
status
byte
and
the
standard
device byte
are
reset to zeros
in
the mUltiplexor
channel registers.
• The device address as specified in the
Start
Device instruction is
sent
to all
trunks
on
the
multiplexor channel.
• A
test
is made to see
if
the specified device control electronics is oper-
able.
Th€ device control electronics has
50
microseconds to signal
the
processor
that
it
is operable.
If
it
does
not
the condition code is set to 3,
the
Halt
Device instruction is terminated
and
program
control is
trans-
ferred
to
the
next instruction.
•
If
the
specified device control electronics is operable,
it
sends
the
standard
device byte to the processor. This
standard
device byte is not
stored
in
the
channel registers.
•
If
the
condition code is
not
set
to 1
(it
is
0,
3)
the
Halt
Device
instruction is terminated and
program
control is
transferred
to
the
next
instruction.,
Notes
on
Halt Device instruction:
1. The channel
status
byte is not stored as a
reult
of
this
operation.
However, the incorrect length
bit
in
the channel
status
byte
may
be set.
53
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