Renesas RH850 Series Application Note

RH850 Series CAN Transmit Procedure (CAN FD Mode)
R01AN6029EJ0100 Rev.1.0 Page
25
of 42
May 10, 2017
3.4 Interrupt Processing of Transmit/receive FIFO Buffer (Transmit Mode)
3.4.1 Transmit/receive FIFO Transmit Interrupt Processing
If the transmit/receive FIFO transmission completion interrupt is enabled, the CANm transmit interrupt is generated
when the condition selected in the CFIM bit setting of the CFCCk register is satisfied.
The CANm transmission interrupts share the following sources. When using multiple interrupt sources, determine the
sources within the interrupt as necessary.
The sources of the CANm transmit interrupt can also be confirmed in the GTINTSTS0 register.
・CANm transmit completion interrupt / CANm transmit abort interrupt
・CANm transmit/receive FIFO transmission completion interrupt
・CANm transmit queue interrupt
・CANm transmit history interrupt
Even if the use of the transmit/receive FIFO buffer is prohibited (the CFE bit is “0”) while an interrupt request is
being generated (the CFTXIF flag in the CFSTSk register is “1”), the CFTXIF flag is not automatically set to “0”. Set
the interrupt request flag to "0" with the program.
You can enable or disable the transmit/receive FIFO transmit interrupt for each transmit/receive FIFO buffer using
the CFTXIE bit of the CFCCk register.
The sources of the transmit/receive FIFO transmission completion interrupt in the transmit mode are shown below.
・Transmit/receive FIFO transmission completion interrupt request occurs when the buffer becomes empty due to the
message transmission completion.
・Transmit/receive FIFO transmission completion interrupt request is generated each time one message transmission
is completed.
送信割り込みを発生させるためには、エラー! 参照元が見つかりません。にある対応する割り込み許可ビッ
トが''1''である割り込み要求フラグをすべて''0''にする必要があります。

Renesas RH850 Series Specifications

General

Core	RH850
Operating Voltage	2.7V to 5.5V
Package Options	LQFP, BGA
Communication Interfaces	CAN, LIN, FlexRay, Ethernet, SPI, I2C, UART
Target Applications	Automotive, Industrial
Timers	Multiple timers
ADC	12-bit, 10-bit
Security Features	Hardware Security Module (HSM)
Safety Features	Memory Protection