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May 10, 2017
5.2 Transmit History Buffer Interrupt Processing
5.2.1 Transmit History Buffer Interrupt Processing
If the transmit history interrupt is enabled, the CANm transmit interrupt is generated when the condition selected in
the THLIM bit setting of the THLCCm register is satisfied.
The CANm transmit interrupts share the following sources. When using multiple interrupt sources, determine the
sources within the interrupt as necessary.
The sources of the CANm transmit interrupt can also be confirmed in the GTINTSTS0 register.
・CANm transmit completion interrupt
・CANm transmit abort interrupt
・CANm transmit/receive FIFO transmit completion interrupt
・CANm transmit queue interrupt
・CANm transmit history interrupt
Even if the use of transmit history is prohibited (the THLE bit is “0”) while an interrupt request is generated (the
THLIF flag in the THLSTSm register is “1”), the THLIF flag is not automatically set to “0”. Set the interrupt request
flag to "0" with the program.
Whether to enable or disable transmit history interrupts can be set for each transmit history buffer using the THLIE
bit of the THLCCm register.
The sources of transmit history interrupts are shown below.
・Transmit history interrupt request occurs when 6 data are stored in the transmit history buffer
・A transmit history interrupt request is generated each time the storage of one transmit history data is completed.
5.2.2 Global Error Interrupt Processing
If the transmit history buffer overflow interrupt is enabled, a global error interrupt will occur when the transmit
history buffer overflow is detected. The transmit history buffer overflow interrupt enable/disable can be set in common
for the entire module with the THLEIE bit of the GCTR register.