K16
U2A16 set RB1-4 to PIN 2 and PIN 3
U2A8 set RB1-4 to PIN 1 and PIN 2
()*1 NAME IN PARENTHESIS DESCRIBES THE FUNKTION VALID FOR U2A8.
RX_DATA_P
TX_DATA_N
GETH0PVCC
TX_DATA_P
E0VCC
J16
H16
K17
G17
VSS
AWOVCL
E0VCC
E0VCC
BALL
GETH0BVCC
GETH0RVCC
GETH0VCL
U2A8
U2A16
DEVICE
E0VCC
VSS
E0VCC
J17
(E0VCC)*1
(VSS)*1
(VSS)*1
Each capacitor ESR
9mOhm @ 1MHz
crystal
resistors close to MCU pin
CAUTION!
5mOhm @ 500kHz
(E0VCC)*1
16 MHz provide additional
20 MHz provide additional
H17
E17
(AWOVCL)*1
(E0VCC)*1
(E0VCC)*1
(E0VCC)*1
RX_DATA_N
24 MHz provide additional
CR-1 : @RH850_U2AX_292PIN_PB_T1_V1_LIB.RH850_U2AX_292PIN_PB_T1_V1(SCH_1):PAGE1
DNF/DNB
Mon Mar 11 07:36:04 2019
4.7uH
PAGE 1 OF 6
1.00
D016636_04
rh850_u2a_292pin_pb_t1_v1
Electronics Europe GmbH
11.03.2019
W.Rauser
DNF/DNB
A2VCC
3.3V or 5V
ren_rh850_u2a16_292_socket
3.3V or 5V
40.000 MHz + socket
18pF
0
DNF/DNB
22u
ESR<10mOhm @ 0.5&1MHZ
22u
22u
22u
22u
22u
22u
100n
100n
GETH0PVCC
3.3V or 5V
3.3V or 5V
100n
RTR040N03HZGTL
DNF/DNB
22p
A1VREFH
GETH0BVCC
GETH0PVCC
3.3V or 5V
SVR_OUTPUT
10
RTR030P02HZGTL
Testpoint_small_ye
SVRDRVCC
3.3V or 5V
3.3V or 5V
3.3V or 5V
3.3V or 5V
3.3V or 5V
8pF
3.3V or 5V
3.3V or 5V
3.3V or 5V
3.3V or 5V
3.3V or 5V
3.3V or 5V
E0VCC
100n
100n
3.3V or 5V
E0VCC
1.12V
E2VCC
VCC
3.3V or 5V
3.3V or 5V
3.3V or 5V
3.3V or 5V
3.3V or 5V
A2VREFH
0
DNF/DNB
0
0
VDD
A0VCC
A1VCC
A2VREFH
A0VCC
SVRDRVCC
SVRAVCC
A1VREFH
AWOVCL
SYSVCC
E1VCC
GETH0VCL
GETH0RVCC
P3V3
100n
100n
1K0
15u
1u
220n
100
DNF/DNB
100
Testpoint_small_rd
220n
100n
100n 100n
100n100n
100n100n 100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
DNF/DNB
DNF/DNB
100
3.3V or 5V
14
12
13
1.09V
11
15
1.12V
3.3V or 5V
3.3V or 5V
3.3V or 5V
100
A2VCC
A1VCC
3.3V or 5V
A0VREFH
3.3V or 5V
E1VCC
E2VCC
100n
100n
VDD
3.3V or 5V
3.3V or 5V
SVRAVCC
3.3V or 5V
SYSVCC
LVDVCC
3.3V or 5V
100n
16MHz
DNF/DNB
22p
LVDVCC
A0VREFH
SG8018CE-20.000000MHz
GETH0BVCC
100n
100n
3.3V or 5V
VCC
100n 100n
22u
3.3V or 5V
GETH0BVCC
Testpoint_small_bl
GETH0RVCC
GETH0VCL
3.3V or 5V
AWOVCL
3.3V or 5V
SVRDRVCC
3.3V
L1
RB2
R1
C16
OSC1
R4
R2
R3
X1
TR1
TR2
C14
C19
C36
C1 C3 C4 C6 C7 C9 C10
C37
C43
C56
C42
C50
C59
C62
C63
C64
R6
R7
C38 C39
C45
C12
R58
TP10
TP9
TP4
C13
C5
C8
C97
C98
R143
C17
C18
C2
RB3
RB4
R34
X3
C68 C69
C20 C22 C23
C25
C26
C27
C28
C29
C21
C24
C31
C30
IC1
RB1
2D3
2D3
4A1
6C3 6C1
4A1
2D3
4C7 2D2
6B7
2D3
2C2
6D1
2D2
4C2 2D2
6A1
4C1 2D6
6B6
6B4
6B3
4E6
4E3
2D8
2D6
2C8
2D2
2B8
2B8
4A1
4C3
5C3
4A1
5B3
3E5
2B2
6C7
6C9
6C9
2B3
5E4
2B6
2A3
2A3 2A2
2D3
5B3
5B3
2B3
6C3
2D2
6D3
6B9
6C7
2D2
6B1 6B4 6B6 6B9
2B2 2B3
6A3
6A6
6A4
2C3
2B2 2B3 6B4
1C9 2C6 2C8 2D6 2D8 4E3 4E6 6B3 6B4 6B6
2B2 2B3 2D2 2D3 5D3 6A4 6B1 6B6
2D2 2D3 4C5 6B3 6B6 6B9
2D3 6C1
2D3 6B3
6B9
2B8 6B1 6B4 6B6
6C4 6C6
2B6
6B4
2A6 2A8 2B6 2B8 6B1 6B3
6C1 6C3 6C7
6C9
6B4
2D2 2D3 4C8 4C9 6B1 6B3
6B7 6C1 6C3
6B3
2B6
2D8 6A7 6B1
6C1 6C3
2D6
2B8
6B3 6C3
2D6 2D8 6B1 6B3 6C1 6C3
6C3
2D6 2D8
6B3 6C1
6A9
6B7
2B2
4A5 6B1
6B4
6B9 6C4
6C6 6C7 6C9
6B6
2B3
6B3
2D6 2D8
2D3
1C7 2C6
RX_DATA_N
SVRDRVSS
ERROROUTZ
VMONOUTZ
DCDC_N
TX_DATA_P
TX_DATA_N
JP0<3..0>
AP2<15..0>
AP3<3..0>
AP1<3..0>
X2
TRSTZ
RESETZ
PWRCTL
JP0<5>
FLMD0
RX_DATAN
RX_DATA_P
X2_C
P2<15..0>
TX_DATAN
RX_DATAP
X1_C
TX_DATAP
DCDC_P
P4<15..4>
P4<1..0>
P5<4..2>
P6<0>
P5<6>
P17<6..0>
P10<14..0>
P6<15..2>
P21<7..0>
P22<4..0>
P24<13..4>
P2<15..0>
P3<8..2>
P20<10..0>
P20<14..12>
AP4<4..0>
X1
AP0<15..0>
3
4
3
2
1
3
1
2
3
1
2
1
1
1
1
2
3
1
2
3
1
2
1
2
3
Y4
Y3
U1
V1
U19
V19
T12
A3
F19
K16
G17
H17
E17
K20
D12
B19
N17
E19
G20
J17
K17
B16
A17
B15
A14
F16
H19
H16
J16
F17
E20
F20
A16
A15
IN
IN
BI
BI
OE
VCC
GND
CLK
IN
OUT
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
IN
S
D
G
D
S
G
BI
IN
IN
IN
IN
IN
IN
IN
OUT
BI
BI
BI
IN
IN
OUT
OUT
SVRPGATE
SVRNGATE
VSS[54..0]
AWOVCL[1..0]
RX_DATAP
GETH0BVCC
RX_DATAN
TX_DATAP
GETH0RVCC
TX_DATAN
GETH0PVCC
GETH0VCL
E2VCC
P20[14..12]
P20[10..0]
P6[15..2]
P5[4..2]
P4[15..4]
P4[1..0]
JP0[3..0]
P21[7..0]
AP0[15..0]
P17[6..0]
A0VSS[4..0]
A1VSS[2..0]
A2VSS[4..0]
AP2[15..0]
P10[14..0]
VDD[17..0]
P22[4..0]
VCC[2..0]
AP3[3..0]
P3[8..2]
P24[13..4]
E0VCC[2..0]
E1VCC[1..0]
AP1[3..0]
P2[15..0]
AP4[4..0]
X2
X1
VMONOUTZ
TRSTZ
SYSVCC
SVRDRVSS
SVRDRVCC
SVRAVSS
SVRAVCC
RESETZ
PWRCTL
P6[0]
P5[6]
LVDVCC
JP0[5]
FLMD0
ERROROUTZ
A2VREFH
A2VCC
A1VREFH
A1VCC
A0VREFH
A0VCC
These intangible goods are not subject to Annex I of common Dual-Use list (428/2009) in its current version.
Size D ocument Nu mber
A2
Title
Date:
9
8
7
6
5
4
3
2
1
9
8
7
6
5
4
3
2
1
A
B
C
D
E
F
A
B
C
D
E
F
COMM ENT
REV
1.00 Release
DRAW N BY
DAT E
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